diff mbox

[v8,8/8] drm/i915: add a sysfs entry to let users set sseu configs

Message ID 20180529191618.19050-9-lionel.g.landwerlin@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Lionel Landwerlin May 29, 2018, 7:16 p.m. UTC
There are concerns about denial of service around the per context sseu
configuration capability. In a previous commit introducing the
capability we allowed it only for capable users. This changes adds a
new debugfs entry to let any user configure its own context
powergating setup.

v2: Rename sysfs entry (Tvrtko)
    Lock interruptible the device in sysfs (Tvrtko)
    Fix dropped error code in getting dynamic sseu value (Tvrtko)
    s/dev_priv/i915/ (Tvrtko)

v3: Drop locked function suffix (Tvrtko)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         | 16 +++++++---
 drivers/gpu/drm/i915/i915_gem_context.c | 38 +++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_sysfs.c       | 40 +++++++++++++++++++++++++
 3 files changed, 90 insertions(+), 4 deletions(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b2386c37437d..5aa96a6650b4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1842,6 +1842,8 @@  struct drm_i915_private {
 		struct ida hw_ida;
 #define MAX_CONTEXT_HW_ID (1<<21) /* exclusive */
 #define GEN11_MAX_CONTEXT_HW_ID (1<<11) /* exclusive */
+
+		bool dynamic_sseu;
 	} contexts;
 
 	u32 fdi_rx_config;
@@ -3259,6 +3261,10 @@  i915_gem_context_lookup(struct drm_i915_file_private *file_priv, u32 id)
 	return ctx;
 }
 
+int i915_gem_contexts_set_dynamic_sseu(struct drm_i915_private *i915,
+				       bool allowed);
+bool i915_gem_contexts_get_dynamic_sseu(struct drm_i915_private *i915);
+
 int i915_perf_open_ioctl(struct drm_device *dev, void *data,
 			 struct drm_file *file);
 int i915_perf_add_config_ioctl(struct drm_device *dev, void *data,
@@ -3859,11 +3865,13 @@  intel_engine_prepare_sseu(struct intel_engine_cs *engine,
 	struct drm_i915_private *i915 = engine->i915;
 
 	/*
-	 * If i915/perf is active, we want a stable powergating configuration
-	 * on the system. The most natural configuration to take in that case
-	 * is the default (i.e maximum the hardware can do).
+	 * If i915/perf is active or dynamic sseu configuration is not allowed
+	 * (through sysfs), we want a stable powergating configuration on the
+	 * system. The most natural configuration to take in that case is the
+	 * default (i.e maximum the hardware can do).
 	 */
-	return i915->perf.oa.exclusive_stream ?
+	return (i915->perf.oa.exclusive_stream ||
+		!i915->contexts.dynamic_sseu) ?
 		intel_device_default_sseu(i915) : sseu;
 }
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 79029815c21f..453bdc976be3 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -1118,6 +1118,44 @@  int i915_gem_context_reset_stats_ioctl(struct drm_device *dev,
 	return ret;
 }
 
+int i915_gem_contexts_set_dynamic_sseu(struct drm_i915_private *i915,
+				       bool allowed)
+{
+	struct intel_engine_cs *engine = i915->engine[RCS];
+	struct i915_gem_context *ctx;
+	int ret = 0;
+
+	lockdep_assert_held(&i915->drm.struct_mutex);
+
+	if (!engine->emit_rpcs_config)
+		return -ENODEV;
+
+	if (allowed == i915->contexts.dynamic_sseu)
+		return 0;
+
+	i915->contexts.dynamic_sseu = allowed;
+
+	list_for_each_entry(ctx, &i915->contexts.list, link) {
+		struct intel_context *ce = to_intel_context(ctx, engine);
+
+		ret = i915_gem_context_reconfigure_sseu(ctx, engine, ce->sseu);
+		if (ret)
+			break;
+	}
+
+	return ret;
+}
+
+bool i915_gem_contexts_get_dynamic_sseu(struct drm_i915_private *i915)
+{
+	struct intel_engine_cs *engine = i915->engine[RCS];
+
+	if (!engine->emit_rpcs_config)
+		return false;
+
+	return i915->contexts.dynamic_sseu;
+}
+
 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
 #include "selftests/mock_context.c"
 #include "selftests/i915_gem_context.c"
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
index e5e6f6bb2b05..d895054d245e 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -483,6 +483,44 @@  static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr
 	return snprintf(buf, PAGE_SIZE, "%d\n", val);
 }
 
+static ssize_t allow_dynamic_sseu_show(struct device *kdev,
+				       struct device_attribute *attr,
+				       char *buf)
+{
+	struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
+	bool value = i915_gem_contexts_get_dynamic_sseu(i915);
+
+	return snprintf(buf, PAGE_SIZE, "%d\n", value);
+}
+
+static ssize_t allow_dynamic_sseu_store(struct device *kdev,
+					struct device_attribute *attr,
+					const char *buf, size_t count)
+{
+	struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
+	ssize_t ret;
+	u32 val;
+
+	ret = kstrtou32(buf, 0, &val);
+	if (ret)
+		return ret;
+
+	if (val != 0 && val != 1)
+		return -EINVAL;
+
+	ret = mutex_lock_interruptible(&i915->drm.struct_mutex);
+	if (ret)
+		return ret;
+
+	ret = i915_gem_contexts_set_dynamic_sseu(i915, val != 0);
+
+	mutex_unlock(&i915->drm.struct_mutex);
+
+	return ret ?: count;
+}
+
+static DEVICE_ATTR_RW(allow_dynamic_sseu);
+
 static const struct attribute *gen6_attrs[] = {
 	&dev_attr_gt_act_freq_mhz.attr,
 	&dev_attr_gt_cur_freq_mhz.attr,
@@ -492,6 +530,7 @@  static const struct attribute *gen6_attrs[] = {
 	&dev_attr_gt_RP0_freq_mhz.attr,
 	&dev_attr_gt_RP1_freq_mhz.attr,
 	&dev_attr_gt_RPn_freq_mhz.attr,
+	&dev_attr_allow_dynamic_sseu.attr,
 	NULL,
 };
 
@@ -505,6 +544,7 @@  static const struct attribute *vlv_attrs[] = {
 	&dev_attr_gt_RP1_freq_mhz.attr,
 	&dev_attr_gt_RPn_freq_mhz.attr,
 	&dev_attr_vlv_rpe_freq_mhz.attr,
+	&dev_attr_allow_dynamic_sseu.attr,
 	NULL,
 };