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[2/7] drm/i915/guc: Refactoring preparation of the GUC_CTL_DEBUG parameter

Message ID 20180530135334.25113-2-piotr.piorkowski@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Piotr Piórkowski May 30, 2018, 1:53 p.m. UTC
At the moment, the preparation of GUC_CTL_DEBUG is disordered.
Lets move all GUC_CTL_DEBUG related operations to one place.

Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_guc.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

Comments

Michal Wajdeczko May 30, 2018, 2:58 p.m. UTC | #1
On Wed, 30 May 2018 15:53:29 +0200, Piotr Piorkowski  
<piotr.piorkowski@intel.com> wrote:

> At the moment, the preparation of GUC_CTL_DEBUG is disordered.
> Lets move all GUC_CTL_DEBUG related operations to one place.
>
> Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Michał Winiarski <michal.winiarski@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/intel_guc.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_guc.c  
> b/drivers/gpu/drm/i915/intel_guc.c
> index 9025837850ad..3cc99fcaaea6 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -205,6 +205,7 @@ void intel_guc_fini(struct intel_guc *guc)
> static u32 guc_ctl_debug_flags(struct intel_guc *guc)
>  {
> +	u32 ads = intel_guc_ggtt_offset(guc, guc->ads_vma) >> PAGE_SHIFT;

if 'ads' is used only in USES_GUC_SUBMISSION case, then maybe we
should define it there ?

>  	u32 level = intel_guc_log_level_get(&guc->log);
>  	u32 flags = 0;
> @@ -217,6 +218,11 @@ static u32 guc_ctl_debug_flags(struct intel_guc  
> *guc)
>  		flags |= GUC_LOG_LEVEL_TO_VERBOSITY(level) <<
>  			 GUC_LOG_VERBOSITY_SHIFT;
> +	if (USES_GUC_SUBMISSION(guc_to_i915(guc))) {
> +		flags |= ads << GUC_ADS_ADDR_SHIFT;
> +		flags |= GUC_ADS_ENABLED;

this can done in single statement

> +	}
> +
>  	return flags;
>  }
> @@ -252,14 +258,9 @@ void intel_guc_init_params(struct intel_guc *guc)
> 	/* If GuC submission is enabled, set up additional parameters here */
>  	if (USES_GUC_SUBMISSION(dev_priv)) {
> -		u32 ads = intel_guc_ggtt_offset(guc,
> -						guc->ads_vma) >> PAGE_SHIFT;
>  		u32 pgs = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
>  		u32 ctx_in_16 = GUC_MAX_STAGE_DESCRIPTORS / 16;
> -		params[GUC_CTL_DEBUG] |= ads << GUC_ADS_ADDR_SHIFT;
> -		params[GUC_CTL_DEBUG] |= GUC_ADS_ENABLED;
> -
>  		pgs >>= PAGE_SHIFT;
>  		params[GUC_CTL_CTXINFO] = (pgs << GUC_CTL_BASE_ADDR_SHIFT) |
>  			(ctx_in_16 << GUC_CTL_CTXNUM_IN16_SHIFT);

with or/without bikesheds fixed,

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 9025837850ad..3cc99fcaaea6 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -205,6 +205,7 @@  void intel_guc_fini(struct intel_guc *guc)
 
 static u32 guc_ctl_debug_flags(struct intel_guc *guc)
 {
+	u32 ads = intel_guc_ggtt_offset(guc, guc->ads_vma) >> PAGE_SHIFT;
 	u32 level = intel_guc_log_level_get(&guc->log);
 	u32 flags = 0;
 
@@ -217,6 +218,11 @@  static u32 guc_ctl_debug_flags(struct intel_guc *guc)
 		flags |= GUC_LOG_LEVEL_TO_VERBOSITY(level) <<
 			 GUC_LOG_VERBOSITY_SHIFT;
 
+	if (USES_GUC_SUBMISSION(guc_to_i915(guc))) {
+		flags |= ads << GUC_ADS_ADDR_SHIFT;
+		flags |= GUC_ADS_ENABLED;
+	}
+
 	return flags;
 }
 
@@ -252,14 +258,9 @@  void intel_guc_init_params(struct intel_guc *guc)
 
 	/* If GuC submission is enabled, set up additional parameters here */
 	if (USES_GUC_SUBMISSION(dev_priv)) {
-		u32 ads = intel_guc_ggtt_offset(guc,
-						guc->ads_vma) >> PAGE_SHIFT;
 		u32 pgs = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
 		u32 ctx_in_16 = GUC_MAX_STAGE_DESCRIPTORS / 16;
 
-		params[GUC_CTL_DEBUG] |= ads << GUC_ADS_ADDR_SHIFT;
-		params[GUC_CTL_DEBUG] |= GUC_ADS_ENABLED;
-
 		pgs >>= PAGE_SHIFT;
 		params[GUC_CTL_CTXINFO] = (pgs << GUC_CTL_BASE_ADDR_SHIFT) |
 			(ctx_in_16 << GUC_CTL_CTXNUM_IN16_SHIFT);