Message ID | 20180531115624.30269-5-jani.nikula@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Thu, May 31, 2018 at 02:56:24PM +0300, Jani Nikula wrote: > Setting PCH type to PCH_NOP before checking whether we actually have a > PCH ends up returning true for HAS_PCH_SPLIT() on all non-PCH split > platforms. Fix this by using PCH_NOP only for platforms that actually > have a PCH. > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.c | 19 +++++++++++-------- > 1 file changed, 11 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 1842a067a604..5deee698881b 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -246,14 +246,6 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv) > { > struct pci_dev *pch = NULL; > > - /* In all current cases, num_pipes is equivalent to the PCH_NOP setting > - * (which really amounts to a PCH but no South Display). > - */ > - if (INTEL_INFO(dev_priv)->num_pipes == 0) { > - dev_priv->pch_type = PCH_NOP; > - return; > - } > - > /* > * The reason to probe ISA bridge instead of Dev31:Fun0 is to > * make graphics device passthrough work easy for VMM, that only > @@ -293,6 +285,17 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv) > break; > } > } > + > + /* > + * Use PCH_NOP (PCH but no South Display) for PCH platforms without Like I said on patch 1 I'd rather document in the enum what it is and here just a "Use PCH_NOP for PCH platforms without display" Lucas De Marchi > + * display. > + */ > + if (pch && INTEL_INFO(dev_priv)->num_pipes == 0) { > + DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n"); > + dev_priv->pch_type = PCH_NOP; > + dev_priv->pch_id = 0; > + } > + > if (!pch) > DRM_DEBUG_KMS("No PCH found.\n"); > > -- > 2.11.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 1842a067a604..5deee698881b 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -246,14 +246,6 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv) { struct pci_dev *pch = NULL; - /* In all current cases, num_pipes is equivalent to the PCH_NOP setting - * (which really amounts to a PCH but no South Display). - */ - if (INTEL_INFO(dev_priv)->num_pipes == 0) { - dev_priv->pch_type = PCH_NOP; - return; - } - /* * The reason to probe ISA bridge instead of Dev31:Fun0 is to * make graphics device passthrough work easy for VMM, that only @@ -293,6 +285,17 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv) break; } } + + /* + * Use PCH_NOP (PCH but no South Display) for PCH platforms without + * display. + */ + if (pch && INTEL_INFO(dev_priv)->num_pipes == 0) { + DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n"); + dev_priv->pch_type = PCH_NOP; + dev_priv->pch_id = 0; + } + if (!pch) DRM_DEBUG_KMS("No PCH found.\n");