From patchwork Wed Jun 6 09:02:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 10449863 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9F0A760234 for ; Wed, 6 Jun 2018 09:02:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8FDF628711 for ; Wed, 6 Jun 2018 09:02:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 83CE129274; Wed, 6 Jun 2018 09:02:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A441A28711 for ; Wed, 6 Jun 2018 09:02:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E47A46E61B; Wed, 6 Jun 2018 09:02:42 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wr0-x244.google.com (mail-wr0-x244.google.com [IPv6:2a00:1450:400c:c0c::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1227E6E61B for ; Wed, 6 Jun 2018 09:02:41 +0000 (UTC) Received: by mail-wr0-x244.google.com with SMTP id k16-v6so5411219wro.0 for ; Wed, 06 Jun 2018 02:02:40 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DjzB+w3SSipQi2xz3qlQrgeR1w/KD3dwJlULuK+44l8=; b=ZX7pTkLilrOAVSSCbIZ4Phw1TNPkh4SJ4CSLO0xlIsUgLuJ5lGhqE0Xj5URocqMP3o MZVIXpYGiRVH+AADU5rilDb7Sa84ALWeOFGofzrucDBha2FI6qa3y/dNHtbqXpvz5ZdW XAsEYMkkP2WkQ0N6L4VyHutfj+kcRs2TsAnPOrpRtOmA2Zw3DBgfK4EyAb4xNxnwF1Yk YOvKUitfWtuYBdWdO3tE3l7ZAZJi4nCw4Y3RiVO2P8csPbM/cJAy4Fyr4by93IRgLGgG AOZ+pOyq/VfHliheMr12Ad71zBdPG+Bxs8LOUibKfpyt7Db+w10MJtBoSG0u+8spybiG Hn8w== X-Gm-Message-State: APt69E04EQmUv9uJNdZxlUoYYgQaJylF7c82avLXFNTZWZtZrG/OyIoV hidmCfkyDrexz5c58zq5UFbaiw== X-Google-Smtp-Source: ADUXVKLLtvDPSaEwl3xRZGxiXFhNw20pEjpPNtVLYABARhoP/rtMbBTYIrIVQ5LnNekBGfQJuRsG4g== X-Received: by 2002:adf:fa07:: with SMTP id m7-v6mr1731088wrr.228.1528275759703; Wed, 06 Jun 2018 02:02:39 -0700 (PDT) Received: from localhost.localdomain ([95.146.151.144]) by smtp.gmail.com with ESMTPSA id b15-v6sm57829327wri.14.2018.06.06.02.02.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Jun 2018 02:02:38 -0700 (PDT) From: Tvrtko Ursulin X-Google-Original-From: Tvrtko Ursulin To: igt-dev@lists.freedesktop.org Date: Wed, 6 Jun 2018 10:02:33 +0100 Message-Id: <20180606090233.6646-1-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <152822764202.9058.18039377220321146761@mail.alporthouse.com> References: <152822764202.9058.18039377220321146761@mail.alporthouse.com> Subject: [Intel-gfx] [PATCH i-g-t v2 2/2] intel_gpu_overlay: Update for class:instance engine tracepoints X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin A miminal hack to parse the new tracepoint format and invent new "ring id's" based on engine class and instance. v2: * Make it a bit more future proof. (Lionel, Chris) * Some assorted fixups to show forgotten engines. Signed-off-by: Tvrtko Ursulin Cc: Lionel Landwerlin Reviewed-by: Lionel Landwerlin --- overlay/gpu-perf.c | 40 ++++++++++++++++++++++++++++++++-------- overlay/overlay.c | 17 +++++++++-------- 2 files changed, 41 insertions(+), 16 deletions(-) diff --git a/overlay/gpu-perf.c b/overlay/gpu-perf.c index ea3480050ab9..5629f826765e 100644 --- a/overlay/gpu-perf.c +++ b/overlay/gpu-perf.c @@ -33,6 +33,7 @@ #include #include #include +#include #include "igt_perf.h" @@ -85,7 +86,8 @@ struct tracepoint { int device_field; int ctx_field; - int ring_field; + int class_field; + int instance_field; int seqno_field; int global_seqno_field; int plane_field; @@ -151,8 +153,10 @@ tracepoint_id(int tp_id) tp->device_field = f; } else if (!strcmp(tp->fields[f].name, "ctx")) { tp->ctx_field = f; - } else if (!strcmp(tp->fields[f].name, "ring")) { - tp->ring_field = f; + } else if (!strcmp(tp->fields[f].name, "class")) { + tp->class_field = f; + } else if (!strcmp(tp->fields[f].name, "instance")) { + tp->instance_field = f; } else if (!strcmp(tp->fields[f].name, "seqno")) { tp->seqno_field = f; } else if (!strcmp(tp->fields[f].name, "global_seqno")) { @@ -175,6 +179,26 @@ tracepoint_id(int tp_id) tracepoints[tp_id].fields[ \ tracepoints[tp_id].field_name##_field].offset)) +#define READ_TP_FIELD_U16(sample, tp_id, field_name) \ + (*(const uint16_t *)((sample)->tracepoint_data + \ + tracepoints[tp_id].fields[ \ + tracepoints[tp_id].field_name##_field].offset)) + +#define GET_RING_ID(sample, tp_id) \ +({ \ + unsigned char class, instance, ring; \ +\ + class = READ_TP_FIELD_U16(sample, tp_id, class); \ + instance = READ_TP_FIELD_U16(sample, tp_id, instance); \ +\ + assert(class <= I915_ENGINE_CLASS_VIDEO_ENHANCE); \ + assert(instance <= 4); \ +\ + ring = class * 4 + instance; \ +\ + ring; \ +}) + static int perf_tracepoint_open(struct gpu_perf *gp, int tp_id, int (*func)(struct gpu_perf *, const void *)) { @@ -313,7 +337,7 @@ static int request_add(struct gpu_perf *gp, const void *event) if (comm == NULL) return 0; - comm->nr_requests[READ_TP_FIELD_U32(sample, TP_GEM_REQUEST_ADD, ring)]++; + comm->nr_requests[GET_RING_ID(sample, TP_GEM_REQUEST_ADD)]++; return 1; } @@ -329,7 +353,7 @@ static int ctx_switch(struct gpu_perf *gp, const void *event) { const struct sample_event *sample = event; - gp->ctx_switch[READ_TP_FIELD_U32(sample, TP_GEM_RING_SWITCH_CONTEXT, ring)]++; + gp->ctx_switch[GET_RING_ID(sample, TP_GEM_RING_SWITCH_CONTEXT)]++; return 1; } @@ -367,8 +391,8 @@ static int wait_begin(struct gpu_perf *gp, const void *event) wait->context = READ_TP_FIELD_U32(sample, TP_GEM_REQUEST_WAIT_BEGIN, ctx); wait->seqno = READ_TP_FIELD_U32(sample, TP_GEM_REQUEST_WAIT_BEGIN, seqno); wait->time = sample->time; - wait->next = gp->wait[READ_TP_FIELD_U32(sample, TP_GEM_REQUEST_WAIT_BEGIN, ring)]; - gp->wait[READ_TP_FIELD_U32(sample, TP_GEM_REQUEST_WAIT_BEGIN, ring)] = wait; + wait->next = gp->wait[GET_RING_ID(sample, TP_GEM_REQUEST_WAIT_BEGIN)]; + gp->wait[GET_RING_ID(sample, TP_GEM_REQUEST_WAIT_BEGIN)] = wait; return 0; } @@ -377,7 +401,7 @@ static int wait_end(struct gpu_perf *gp, const void *event) { const struct sample_event *sample = event; struct gpu_perf_time *wait, **prev; - uint32_t engine = READ_TP_FIELD_U32(sample, TP_GEM_REQUEST_WAIT_END, ring); + uint32_t engine = GET_RING_ID(sample, TP_GEM_REQUEST_WAIT_END); uint32_t context = READ_TP_FIELD_U32(sample, TP_GEM_REQUEST_WAIT_END, ctx); uint32_t seqno = READ_TP_FIELD_U32(sample, TP_GEM_REQUEST_WAIT_END, seqno); diff --git a/overlay/overlay.c b/overlay/overlay.c index 545af7bcb2f5..eae5ddfa8823 100644 --- a/overlay/overlay.c +++ b/overlay/overlay.c @@ -148,6 +148,7 @@ static void init_gpu_top(struct overlay_context *ctx, { 0.25, 1, 0.25, 1 }, { 0.25, 0.25, 1, 1 }, { 1, 1, 1, 1 }, + { 1, 1, 0.25, 1 }, }; int n; @@ -311,11 +312,11 @@ static void show_gpu_perf(struct overlay_context *ctx, struct overlay_gpu_perf * { 1, 1, 1, 1 }, }; struct gpu_perf_comm *comm, **prev; - const char *ring_name[] = { - "R", - "B", - "V0", - "V1", + const char *ring_name[MAX_RINGS] = { + "R", "?", "?", "?", + "B", "?", "?", "?", + "V0", "V1", "?", "?", + "VE0", "?", "?", "?", }; double range[2]; char buf[1024]; @@ -326,7 +327,7 @@ static void show_gpu_perf(struct overlay_context *ctx, struct overlay_gpu_perf * gpu_perf_update(&gp->gpu_perf); - for (n = 0; n < 4; n++) { + for (n = 0; n < MAX_RINGS; n++) { if (gp->gpu_perf.ctx_switch[n]) has_ctx = n + 1; if (gp->gpu_perf.flip_complete[n]) @@ -389,7 +390,7 @@ static void show_gpu_perf(struct overlay_context *ctx, struct overlay_gpu_perf * } total = 0; - for (n = 0; n < 3; n++) + for (n = 0; n < MAX_RINGS; n++) total += comm->nr_requests[n]; chart_add_sample(comm->user_data, total); } @@ -433,7 +434,7 @@ static void show_gpu_perf(struct overlay_context *ctx, struct overlay_gpu_perf * goto skip_comm; len = sprintf(buf, "%s:", comm->name); - for (n = 0; n < sizeof(ring_name)/sizeof(ring_name[0]); n++) { + for (n = 0; n < MAX_RINGS; n++) { if (comm->nr_requests[n] == 0) continue; len += sprintf(buf + len, "%s %d%s", need_comma ? "," : "", comm->nr_requests[n], ring_name[n]);