| Message ID | 20180607073025.21066-1-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Mark order? I have no idea. Let me go get some coffee. Quoting Chris Wilson (2018-06-07 08:30:24) > When using CS commands, PP_DIR is not sampled until the context is > loaded, but when doing manual mmio after reset we load the context > before the mm. Let's switch this over for consistency. > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> > Cc: Matthew Auld <matthew.william.auld@gmail.com> > --- > drivers/gpu/drm/i915/intel_ringbuffer.c | 21 +++++++++++---------- > 1 file changed, 11 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c > index 65811e2fa7da..4051fb55a2cf 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -574,16 +574,7 @@ static void reset_ring(struct intel_engine_cs *engine, > struct intel_context *ce = request->hw_context; > struct i915_hw_ppgtt *ppgtt; > > - if (ce->state) { > - I915_WRITE(CCID, > - i915_ggtt_offset(ce->state) | > - BIT(8) /* must be set! */ | > - CCID_EXTENDED_STATE_SAVE | > - CCID_EXTENDED_STATE_RESTORE | > - CCID_EN); > - } > - > - ppgtt = request->gem_context->ppgtt ?: engine->i915->mm.aliasing_ppgtt; > + ppgtt = request->gem_context->ppgtt ?: dev_priv->mm.aliasing_ppgtt; > if (ppgtt) { > u32 pd_offset = ppgtt->pd.base.ggtt_offset << 10; > > @@ -600,6 +591,16 @@ static void reset_ring(struct intel_engine_cs *engine, > ppgtt->pd_dirty_rings &= ~intel_engine_flag(engine); > } > > + if (ce->state) { > + I915_WRITE(CCID, > + i915_ggtt_offset(ce->state) | > + BIT(8) /* must be set! */ | > + CCID_EXTENDED_STATE_SAVE | > + CCID_EXTENDED_STATE_RESTORE | > + CCID_EN); > + } > + > + > /* If the rq hung, jump to its breadcrumb and skip the batch */ > if (request->fence.error == -EIO) > request->ring->head = request->postfix; > -- > 2.17.1 >
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 65811e2fa7da..4051fb55a2cf 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -574,16 +574,7 @@ static void reset_ring(struct intel_engine_cs *engine, struct intel_context *ce = request->hw_context; struct i915_hw_ppgtt *ppgtt; - if (ce->state) { - I915_WRITE(CCID, - i915_ggtt_offset(ce->state) | - BIT(8) /* must be set! */ | - CCID_EXTENDED_STATE_SAVE | - CCID_EXTENDED_STATE_RESTORE | - CCID_EN); - } - - ppgtt = request->gem_context->ppgtt ?: engine->i915->mm.aliasing_ppgtt; + ppgtt = request->gem_context->ppgtt ?: dev_priv->mm.aliasing_ppgtt; if (ppgtt) { u32 pd_offset = ppgtt->pd.base.ggtt_offset << 10; @@ -600,6 +591,16 @@ static void reset_ring(struct intel_engine_cs *engine, ppgtt->pd_dirty_rings &= ~intel_engine_flag(engine); } + if (ce->state) { + I915_WRITE(CCID, + i915_ggtt_offset(ce->state) | + BIT(8) /* must be set! */ | + CCID_EXTENDED_STATE_SAVE | + CCID_EXTENDED_STATE_RESTORE | + CCID_EN); + } + + /* If the rq hung, jump to its breadcrumb and skip the batch */ if (request->fence.error == -EIO) request->ring->head = request->postfix;
When using CS commands, PP_DIR is not sampled until the context is loaded, but when doing manual mmio after reset we load the context before the mm. Let's switch this over for consistency. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Matthew Auld <matthew.william.auld@gmail.com> --- drivers/gpu/drm/i915/intel_ringbuffer.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-)