From patchwork Sun Jun 10 19:43:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 10456723 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4D747601F7 for ; Sun, 10 Jun 2018 19:44:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3D65926E79 for ; Sun, 10 Jun 2018 19:44:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 32760274D0; Sun, 10 Jun 2018 19:44:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B7E2726E79 for ; Sun, 10 Jun 2018 19:43:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3976F89E14; Sun, 10 Jun 2018 19:43:59 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (mail.fireflyinternet.com [109.228.58.192]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6D3D489BF0 for ; Sun, 10 Jun 2018 19:43:54 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from haswell.alporthouse.com (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 12004293-1500050 for multiple; Sun, 10 Jun 2018 20:43:50 +0100 Received: by haswell.alporthouse.com (sSMTP sendmail emulation); Sun, 10 Jun 2018 20:43:49 +0100 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Sun, 10 Jun 2018 20:43:16 +0100 Message-Id: <20180610194325.13467-9-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180610194325.13467-1-chris@chris-wilson.co.uk> References: <20180610194325.13467-1-chris@chris-wilson.co.uk> X-Originating-IP: 78.156.65.138 X-Country: code=GB country="United Kingdom" ip=78.156.65.138 Subject: [Intel-gfx] [PATCH 08/17] drm/i915/gtt: Onionify error handling for gen6_ppgtt_create X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Pull the empty stubs together into the top level gen6_ppgtt_create, and tear each one down on error in proper onion order (rather than use Joonas' pet hate of calling the cleanup function in indeterminable state). Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Cc: Mika Kuoppala Cc: Matthew Auld Reviewed-by: Matthew Auld Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/i915_gem_gtt.c | 81 ++++++++++++++--------------- 1 file changed, 39 insertions(+), 42 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index cc0e747b9286..e9fcc4370b1a 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -1875,7 +1875,7 @@ static int gen6_alloc_va_range(struct i915_address_space *vm, return -ENOMEM; } -static int gen6_init_scratch(struct i915_address_space *vm) +static int gen6_ppgtt_init_scratch(struct i915_address_space *vm) { int ret; @@ -1894,33 +1894,37 @@ static int gen6_init_scratch(struct i915_address_space *vm) return 0; } -static void gen6_free_scratch(struct i915_address_space *vm) +static void gen6_ppgtt_free_scratch(struct i915_address_space *vm) { free_pt(vm, vm->scratch_pt); cleanup_scratch_page(vm); } -static void gen6_ppgtt_cleanup(struct i915_address_space *vm) +static void gen6_ppgtt_free_pd(struct gen6_hw_ppgtt *ppgtt) { - struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(i915_vm_to_ppgtt(vm)); struct i915_page_table *pt; u32 pde; - drm_mm_remove_node(&ppgtt->node); - gen6_for_all_pdes(pt, &ppgtt->base.pd, pde) - if (pt != vm->scratch_pt) - free_pt(vm, pt); + if (pt != ppgtt->base.vm.scratch_pt) + free_pt(&ppgtt->base.vm, pt); +} - gen6_free_scratch(vm); +static void gen6_ppgtt_cleanup(struct i915_address_space *vm) +{ + struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(i915_vm_to_ppgtt(vm)); + + drm_mm_remove_node(&ppgtt->node); + + gen6_ppgtt_free_pd(ppgtt); + gen6_ppgtt_free_scratch(vm); } static int gen6_ppgtt_allocate_page_directories(struct gen6_hw_ppgtt *ppgtt) { - struct i915_address_space *vm = &ppgtt->base.vm; struct drm_i915_private *dev_priv = ppgtt->base.vm.i915; struct i915_ggtt *ggtt = &dev_priv->ggtt; - int ret; + int err; /* PPGTT PDEs reside in the GGTT and consists of 512 entries. The * allocator works in address space sizes, so it's multiplied by page @@ -1928,17 +1932,13 @@ static int gen6_ppgtt_allocate_page_directories(struct gen6_hw_ppgtt *ppgtt) */ BUG_ON(!drm_mm_initialized(&ggtt->vm.mm)); - ret = gen6_init_scratch(vm); - if (ret) - return ret; - - ret = i915_gem_gtt_insert(&ggtt->vm, &ppgtt->node, + err = i915_gem_gtt_insert(&ggtt->vm, &ppgtt->node, GEN6_PD_SIZE, GEN6_PD_ALIGN, I915_COLOR_UNEVICTABLE, 0, ggtt->vm.total, PIN_HIGH); - if (ret) - goto err_out; + if (err) + return err; if (ppgtt->node.start < ggtt->mappable_end) DRM_DEBUG("Forced to use aperture for PDEs\n"); @@ -1950,15 +1950,6 @@ static int gen6_ppgtt_allocate_page_directories(struct gen6_hw_ppgtt *ppgtt) ppgtt->base.pd.base.ggtt_offset / sizeof(gen6_pte_t); return 0; - -err_out: - gen6_free_scratch(vm); - return ret; -} - -static int gen6_ppgtt_alloc(struct gen6_hw_ppgtt *ppgtt) -{ - return gen6_ppgtt_allocate_page_directories(ppgtt); } static void gen6_scratch_va_range(struct gen6_hw_ppgtt *ppgtt, @@ -1984,21 +1975,8 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915) ppgtt->base.vm.i915 = i915; ppgtt->base.vm.dma = &i915->drm.pdev->dev; - ppgtt->base.vm.pte_encode = ggtt->vm.pte_encode; - - err = gen6_ppgtt_alloc(ppgtt); - if (err) - goto err_free; - ppgtt->base.vm.total = I915_PDES * GEN6_PTES * PAGE_SIZE; - gen6_scratch_va_range(ppgtt, 0, ppgtt->base.vm.total); - gen6_write_page_range(&ppgtt->base, 0, ppgtt->base.vm.total); - - err = gen6_alloc_va_range(&ppgtt->base.vm, 0, ppgtt->base.vm.total); - if (err) - goto err_cleanup; - ppgtt->base.vm.clear_range = gen6_ppgtt_clear_range; ppgtt->base.vm.insert_entries = gen6_ppgtt_insert_entries; ppgtt->base.vm.cleanup = gen6_ppgtt_cleanup; @@ -2009,6 +1987,23 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915) ppgtt->base.vm.vma_ops.set_pages = ppgtt_set_pages; ppgtt->base.vm.vma_ops.clear_pages = clear_pages; + ppgtt->base.vm.pte_encode = ggtt->vm.pte_encode; + + err = gen6_ppgtt_init_scratch(&ppgtt->base.vm); + if (err) + goto err_free; + + err = gen6_ppgtt_allocate_page_directories(ppgtt); + if (err) + goto err_scratch; + + gen6_scratch_va_range(ppgtt, 0, ppgtt->base.vm.total); + gen6_write_page_range(&ppgtt->base, 0, ppgtt->base.vm.total); + + err = gen6_alloc_va_range(&ppgtt->base.vm, 0, ppgtt->base.vm.total); + if (err) + goto err_pd; + DRM_DEBUG_DRIVER("Allocated pde space (%lldM) at GTT entry: %llx\n", ppgtt->node.size >> 20, ppgtt->node.start / PAGE_SIZE); @@ -2018,8 +2013,10 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915) return &ppgtt->base; -err_cleanup: - gen6_ppgtt_cleanup(&ppgtt->base.vm); +err_pd: + gen6_ppgtt_free_pd(ppgtt); +err_scratch: + gen6_ppgtt_free_scratch(&ppgtt->base.vm); err_free: kfree(ppgtt); return ERR_PTR(err);