| Message ID | 20180613170710.15080-5-imre.deak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Jun 13, 2018 at 08:07:09PM +0300, Imre Deak wrote: > On ICL for setting the HDMI infoframe the pipe clock needs to be > enabled, otherwise accessing the VIDEO_DIP_CTL register will hang the > machine. > > Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Imre Deak <imre.deak@intel.com> Looks safe to me. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_ddi.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > index bfa451ac9f09..08336a66d5c6 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -2958,11 +2958,11 @@ static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder, > if (IS_GEN9_BC(dev_priv)) > skl_ddi_set_iboost(encoder, level, INTEL_OUTPUT_HDMI); > > + intel_ddi_enable_pipe_clock(crtc_state); > + > intel_dig_port->set_infoframes(&encoder->base, > crtc_state->has_infoframe, > crtc_state, conn_state); > - > - intel_ddi_enable_pipe_clock(crtc_state); > } > > static void intel_ddi_pre_enable(struct intel_encoder *encoder, > @@ -3070,13 +3070,13 @@ static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder, > struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base); > struct intel_hdmi *intel_hdmi = &dig_port->hdmi; > > + dig_port->set_infoframes(&encoder->base, false, > + old_crtc_state, old_conn_state); > + > intel_ddi_disable_pipe_clock(old_crtc_state); > > intel_disable_ddi_buf(encoder); > > - dig_port->set_infoframes(&encoder->base, false, > - old_crtc_state, old_conn_state); > - > intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain); > > intel_ddi_clk_disable(encoder); > -- > 2.13.2
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index bfa451ac9f09..08336a66d5c6 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2958,11 +2958,11 @@ static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder, if (IS_GEN9_BC(dev_priv)) skl_ddi_set_iboost(encoder, level, INTEL_OUTPUT_HDMI); + intel_ddi_enable_pipe_clock(crtc_state); + intel_dig_port->set_infoframes(&encoder->base, crtc_state->has_infoframe, crtc_state, conn_state); - - intel_ddi_enable_pipe_clock(crtc_state); } static void intel_ddi_pre_enable(struct intel_encoder *encoder, @@ -3070,13 +3070,13 @@ static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder, struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base); struct intel_hdmi *intel_hdmi = &dig_port->hdmi; + dig_port->set_infoframes(&encoder->base, false, + old_crtc_state, old_conn_state); + intel_ddi_disable_pipe_clock(old_crtc_state); intel_disable_ddi_buf(encoder); - dig_port->set_infoframes(&encoder->base, false, - old_crtc_state, old_conn_state); - intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain); intel_ddi_clk_disable(encoder);
On ICL for setting the HDMI infoframe the pipe clock needs to be enabled, otherwise accessing the VIDEO_DIP_CTL register will hang the machine. Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/intel_ddi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)