| Message ID | 20180614094103.18025-1-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Quoting Chris Wilson (2018-06-14 12:40:59) > This should be a no-op in terms of our control flow, we move the > sanitization (GPU reset) from the bottom of the early resume phase to > the top of the next. However, following hibernation debug, the power > code skips the early resume phase, but as we are about to completely > restore the GTT mappings, we first need to stop the GPU using them i.e. > perform a GPU reset (i915_gem_sanitize()). > > Testcase: igt/gem_exec_suspend/basic-S4-devices > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Imre Deak <imre.deak@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Regards, Joonas
Quoting Joonas Lahtinen (2018-06-14 13:00:22) > Quoting Chris Wilson (2018-06-14 12:40:59) > > This should be a no-op in terms of our control flow, we move the > > sanitization (GPU reset) from the bottom of the early resume phase to > > the top of the next. However, following hibernation debug, the power > > code skips the early resume phase, but as we are about to completely > > restore the GTT mappings, we first need to stop the GPU using them i.e. > > perform a GPU reset (i915_gem_sanitize()). > > > > Testcase: igt/gem_exec_suspend/basic-S4-devices > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > > Cc: Imre Deak <imre.deak@intel.com> > > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > > Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> And pushed, because the GPU hangs on S4-device shows up occasionally in drm-tip as well. It's just they became frequent and persistent enough with the last patch in series that I noticed. -Chris
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 6e6413c1d068..7423d78f38f4 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1698,6 +1698,8 @@ static int i915_drm_resume(struct drm_device *dev) disable_rpm_wakeref_asserts(dev_priv); intel_sanitize_gt_powersave(dev_priv); + i915_gem_sanitize(dev_priv); + ret = i915_ggtt_enable_hw(dev_priv); if (ret) DRM_ERROR("failed to re-enable GGTT\n"); @@ -1839,8 +1841,6 @@ static int i915_drm_resume_early(struct drm_device *dev) else intel_display_set_init_power(dev_priv, true); - i915_gem_sanitize(dev_priv); - enable_rpm_wakeref_asserts(dev_priv); out:
This should be a no-op in terms of our control flow, we move the sanitization (GPU reset) from the bottom of the early resume phase to the top of the next. However, following hibernation debug, the power code skips the early resume phase, but as we are about to completely restore the GTT mappings, we first need to stop the GPU using them i.e. perform a GPU reset (i915_gem_sanitize()). Testcase: igt/gem_exec_suspend/basic-S4-devices Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Imre Deak <imre.deak@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> --- drivers/gpu/drm/i915/i915_drv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)