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[1/2] drm/i915/whl: Introducing Whiskey Lake platform

Message ID 20180614220832.22677-1-jose.souza@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Souza, Jose June 14, 2018, 10:08 p.m. UTC
Whiskey Lake uses the same gen graphics as Coffe Lake, including some
ids that were previously marked as reserved on Coffe Lake, but that
now are moved to WHL page.

So, let's just move them to WHL macros that will feed into CFL macro
just to keep it better organized to make easier future code review
but it will be handled as a CFL.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c |  4 +++-
 include/drm/i915_pciids.h       | 28 ++++++++++++++++++----------
 2 files changed, 21 insertions(+), 11 deletions(-)

Comments

Rodrigo Vivi June 14, 2018, 11 p.m. UTC | #1
On Thu, Jun 14, 2018 at 03:08:31PM -0700, José Roberto de Souza wrote:
> Whiskey Lake uses the same gen graphics as Coffe Lake, including some
> ids that were previously marked as reserved on Coffe Lake, but that
> now are moved to WHL page.
> 
> So, let's just move them to WHL macros that will feed into CFL macro
> just to keep it better organized to make easier future code review
> but it will be handled as a CFL.
> 
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c |  4 +++-
>  include/drm/i915_pciids.h       | 28 ++++++++++++++++++----------
>  2 files changed, 21 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 97a91e6af7e3..92e98773e53d 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -660,9 +660,11 @@ static const struct pci_device_id pciidlist[] = {
>  	INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
>  	INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
>  	INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
> -	INTEL_CFL_U_GT1_IDS(&intel_coffeelake_gt1_info),
>  	INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
>  	INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> +	INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),
> +	INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
> +	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
>  	INTEL_CNL_IDS(&intel_cannonlake_info),
>  	INTEL_ICL_11_IDS(&intel_icelake_11_info),
>  	{0, 0, 0}
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index bab70ff6e78b..3de071588d6a 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -388,32 +388,40 @@
>  	INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
>  	INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
>  
> -/* CFL U GT1 */
> -#define INTEL_CFL_U_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA1, info), \
> -	INTEL_VGA_DEVICE(0x3EA4, info)
> -
>  /* CFL U GT2 */
>  #define INTEL_CFL_U_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA0, info), \
> -	INTEL_VGA_DEVICE(0x3EA3, info), \
>  	INTEL_VGA_DEVICE(0x3EA9, info)
>  
>  /* CFL U GT3 */
>  #define INTEL_CFL_U_GT3_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
>  
> +/* WHL/CFL U GT1 */
> +#define INTEL_WHL_U_GT1_IDS(info) \
> +	INTEL_VGA_DEVICE(0x3EA1, info), \

I believe this is the only GT1

> +	INTEL_VGA_DEVICE(0x3EA4, info)
> +
> +/* WHL/CFL U GT2 */
> +#define INTEL_WHL_U_GT2_IDS(info) \
> +	INTEL_VGA_DEVICE(0x3EA0, info), \

and this is the only GT2

> +	INTEL_VGA_DEVICE(0x3EA3, info)
> +
> +/* WHL/CFL U GT3 */
> +#define INTEL_WHL_U_GT3_IDS(info) \
> +	INTEL_VGA_DEVICE(0x3EA2, info) /* ULT GT3 */

this, 0x3EA3 and 0x3EA4 should be gt3 I think...

> +
>  #define INTEL_CFL_IDS(info)	   \
>  	INTEL_CFL_S_GT1_IDS(info), \
>  	INTEL_CFL_S_GT2_IDS(info), \
>  	INTEL_CFL_H_GT2_IDS(info), \
> -	INTEL_CFL_U_GT1_IDS(info), \
>  	INTEL_CFL_U_GT2_IDS(info), \
> -	INTEL_CFL_U_GT3_IDS(info)
> +	INTEL_CFL_U_GT3_IDS(info), \
> +	INTEL_WHL_U_GT1_IDS(info), \
> +	INTEL_WHL_U_GT2_IDS(info), \
> +	INTEL_WHL_U_GT3_IDS(info)
>  
>  /* CNL */
>  #define INTEL_CNL_IDS(info) \
> -- 
> 2.17.1
>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 97a91e6af7e3..92e98773e53d 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -660,9 +660,11 @@  static const struct pci_device_id pciidlist[] = {
 	INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
 	INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
 	INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
-	INTEL_CFL_U_GT1_IDS(&intel_coffeelake_gt1_info),
 	INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
 	INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
+	INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),
+	INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
+	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
 	INTEL_CNL_IDS(&intel_cannonlake_info),
 	INTEL_ICL_11_IDS(&intel_icelake_11_info),
 	{0, 0, 0}
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index bab70ff6e78b..3de071588d6a 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -388,32 +388,40 @@ 
 	INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
 	INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
 
-/* CFL U GT1 */
-#define INTEL_CFL_U_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x3EA1, info), \
-	INTEL_VGA_DEVICE(0x3EA4, info)
-
 /* CFL U GT2 */
 #define INTEL_CFL_U_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x3EA0, info), \
-	INTEL_VGA_DEVICE(0x3EA3, info), \
 	INTEL_VGA_DEVICE(0x3EA9, info)
 
 /* CFL U GT3 */
 #define INTEL_CFL_U_GT3_IDS(info) \
-	INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
 	INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
 	INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
 	INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
 	INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
 
+/* WHL/CFL U GT1 */
+#define INTEL_WHL_U_GT1_IDS(info) \
+	INTEL_VGA_DEVICE(0x3EA1, info), \
+	INTEL_VGA_DEVICE(0x3EA4, info)
+
+/* WHL/CFL U GT2 */
+#define INTEL_WHL_U_GT2_IDS(info) \
+	INTEL_VGA_DEVICE(0x3EA0, info), \
+	INTEL_VGA_DEVICE(0x3EA3, info)
+
+/* WHL/CFL U GT3 */
+#define INTEL_WHL_U_GT3_IDS(info) \
+	INTEL_VGA_DEVICE(0x3EA2, info) /* ULT GT3 */
+
 #define INTEL_CFL_IDS(info)	   \
 	INTEL_CFL_S_GT1_IDS(info), \
 	INTEL_CFL_S_GT2_IDS(info), \
 	INTEL_CFL_H_GT2_IDS(info), \
-	INTEL_CFL_U_GT1_IDS(info), \
 	INTEL_CFL_U_GT2_IDS(info), \
-	INTEL_CFL_U_GT3_IDS(info)
+	INTEL_CFL_U_GT3_IDS(info), \
+	INTEL_WHL_U_GT1_IDS(info), \
+	INTEL_WHL_U_GT2_IDS(info), \
+	INTEL_WHL_U_GT3_IDS(info)
 
 /* CNL */
 #define INTEL_CNL_IDS(info) \