[v2,1/2] drm/i915/whl: Introducing Whiskey Lake platform

Message ID	20180614233720.30517-1-jose.souza@intel.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <intel-gfx-bounces@lists.freedesktop.org> From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= <jose.souza@intel.com> To: intel-gfx@lists.freedesktop.org Date: Thu, 14 Jun 2018 16:37:19 -0700 Message-Id: <20180614233720.30517-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 1/2] drm/i915/whl: Introducing Whiskey Lake platform Precedence: list Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>

Message ID

20180614233720.30517-1-jose.souza@intel.com (mailing list archive)

State

New, archived

Headers

From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Date: Thu, 14 Jun 2018 16:37:19 -0700
Message-Id: <20180614233720.30517-1-jose.souza@intel.com>
MIME-Version: 1.0
Subject: [Intel-gfx] [PATCH v2 1/2] drm/i915/whl: Introducing Whiskey Lake
	platform
Precedence: list
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: base64
Errors-To: intel-gfx-bounces@lists.freedesktop.org
Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>

Commit Message

Souza, Jose June 14, 2018, 11:37 p.m. UTC

Whiskey Lake uses the same gen graphics as Coffe Lake, including some
ids that were previously marked as reserved on Coffe Lake, but that
now are moved to WHL page.

So, let's just move them to WHL macros that will feed into CFL macro
just to keep it better organized to make easier future code review
but it will be handled as a CFL.

v2:
Fixing GT level of some ids

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c |  4 +++-
 include/drm/i915_pciids.h       | 28 ++++++++++++++++++----------
 2 files changed, 21 insertions(+), 11 deletions(-)

Comments

Rodrigo Vivi June 14, 2018, 11:59 p.m. UTC | #1

On Thu, Jun 14, 2018 at 04:37:19PM -0700, José Roberto de Souza wrote:
> Whiskey Lake uses the same gen graphics as Coffe Lake, including some
> ids that were previously marked as reserved on Coffe Lake, but that
> now are moved to WHL page.
> 
> So, let's just move them to WHL macros that will feed into CFL macro
> just to keep it better organized to make easier future code review
> but it will be handled as a CFL.
> 
> v2:
> Fixing GT level of some ids
> 
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_pci.c |  4 +++-
>  include/drm/i915_pciids.h       | 28 ++++++++++++++++++----------
>  2 files changed, 21 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 97a91e6af7e3..92e98773e53d 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -660,9 +660,11 @@ static const struct pci_device_id pciidlist[] = {
>  	INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
>  	INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
>  	INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
> -	INTEL_CFL_U_GT1_IDS(&intel_coffeelake_gt1_info),
>  	INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
>  	INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> +	INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),
> +	INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
> +	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
>  	INTEL_CNL_IDS(&intel_cannonlake_info),
>  	INTEL_ICL_11_IDS(&intel_icelake_11_info),
>  	{0, 0, 0}
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index bab70ff6e78b..d03350a38025 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -388,32 +388,40 @@
>  	INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
>  	INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
>  
> -/* CFL U GT1 */
> -#define INTEL_CFL_U_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA1, info), \
> -	INTEL_VGA_DEVICE(0x3EA4, info)
> -
>  /* CFL U GT2 */
>  #define INTEL_CFL_U_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA0, info), \
> -	INTEL_VGA_DEVICE(0x3EA3, info), \
>  	INTEL_VGA_DEVICE(0x3EA9, info)
>  
>  /* CFL U GT3 */
>  #define INTEL_CFL_U_GT3_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
>  
> +/* WHL/CFL U GT1 */
> +#define INTEL_WHL_U_GT1_IDS(info) \
> +	INTEL_VGA_DEVICE(0x3EA1, info)
> +
> +/* WHL/CFL U GT2 */
> +#define INTEL_WHL_U_GT2_IDS(info) \
> +	INTEL_VGA_DEVICE(0x3EA0, info)
> +
> +/* WHL/CFL U GT3 */
> +#define INTEL_WHL_U_GT3_IDS(info) \
> +	INTEL_VGA_DEVICE(0x3EA2, info), \
> +	INTEL_VGA_DEVICE(0x3EA3, info), \
> +	INTEL_VGA_DEVICE(0x3EA4, info)
> +
>  #define INTEL_CFL_IDS(info)	   \
>  	INTEL_CFL_S_GT1_IDS(info), \
>  	INTEL_CFL_S_GT2_IDS(info), \
>  	INTEL_CFL_H_GT2_IDS(info), \
> -	INTEL_CFL_U_GT1_IDS(info), \
>  	INTEL_CFL_U_GT2_IDS(info), \
> -	INTEL_CFL_U_GT3_IDS(info)
> +	INTEL_CFL_U_GT3_IDS(info), \
> +	INTEL_WHL_U_GT1_IDS(info), \
> +	INTEL_WHL_U_GT2_IDS(info), \
> +	INTEL_WHL_U_GT3_IDS(info)
>  
>  /* CNL */
>  #define INTEL_CNL_IDS(info) \
> -- 
> 2.17.1
>

Rodrigo Vivi June 18, 2018, 5:51 p.m. UTC | #2

On Thu, Jun 14, 2018 at 04:59:32PM -0700, Rodrigo Vivi wrote:
> On Thu, Jun 14, 2018 at 04:37:19PM -0700, José Roberto de Souza wrote:
> > Whiskey Lake uses the same gen graphics as Coffe Lake, including some
> > ids that were previously marked as reserved on Coffe Lake, but that
> > now are moved to WHL page.
> > 
> > So, let's just move them to WHL macros that will feed into CFL macro
> > just to keep it better organized to make easier future code review
> > but it will be handled as a CFL.
> > 
> > v2:
> > Fixing GT level of some ids
> > 
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

pushed to dinq, thanks.

> 
> > ---
> >  drivers/gpu/drm/i915/i915_pci.c |  4 +++-
> >  include/drm/i915_pciids.h       | 28 ++++++++++++++++++----------
> >  2 files changed, 21 insertions(+), 11 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > index 97a91e6af7e3..92e98773e53d 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -660,9 +660,11 @@ static const struct pci_device_id pciidlist[] = {
> >  	INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
> >  	INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
> >  	INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
> > -	INTEL_CFL_U_GT1_IDS(&intel_coffeelake_gt1_info),
> >  	INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
> >  	INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> > +	INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),
> > +	INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
> > +	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> >  	INTEL_CNL_IDS(&intel_cannonlake_info),
> >  	INTEL_ICL_11_IDS(&intel_icelake_11_info),
> >  	{0, 0, 0}
> > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> > index bab70ff6e78b..d03350a38025 100644
> > --- a/include/drm/i915_pciids.h
> > +++ b/include/drm/i915_pciids.h
> > @@ -388,32 +388,40 @@
> >  	INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
> >  	INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
> >  
> > -/* CFL U GT1 */
> > -#define INTEL_CFL_U_GT1_IDS(info) \
> > -	INTEL_VGA_DEVICE(0x3EA1, info), \
> > -	INTEL_VGA_DEVICE(0x3EA4, info)
> > -
> >  /* CFL U GT2 */
> >  #define INTEL_CFL_U_GT2_IDS(info) \
> > -	INTEL_VGA_DEVICE(0x3EA0, info), \
> > -	INTEL_VGA_DEVICE(0x3EA3, info), \
> >  	INTEL_VGA_DEVICE(0x3EA9, info)
> >  
> >  /* CFL U GT3 */
> >  #define INTEL_CFL_U_GT3_IDS(info) \
> > -	INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
> >  	INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
> >  	INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
> >  	INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
> >  	INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
> >  
> > +/* WHL/CFL U GT1 */
> > +#define INTEL_WHL_U_GT1_IDS(info) \
> > +	INTEL_VGA_DEVICE(0x3EA1, info)
> > +
> > +/* WHL/CFL U GT2 */
> > +#define INTEL_WHL_U_GT2_IDS(info) \
> > +	INTEL_VGA_DEVICE(0x3EA0, info)
> > +
> > +/* WHL/CFL U GT3 */
> > +#define INTEL_WHL_U_GT3_IDS(info) \
> > +	INTEL_VGA_DEVICE(0x3EA2, info), \
> > +	INTEL_VGA_DEVICE(0x3EA3, info), \
> > +	INTEL_VGA_DEVICE(0x3EA4, info)
> > +
> >  #define INTEL_CFL_IDS(info)	   \
> >  	INTEL_CFL_S_GT1_IDS(info), \
> >  	INTEL_CFL_S_GT2_IDS(info), \
> >  	INTEL_CFL_H_GT2_IDS(info), \
> > -	INTEL_CFL_U_GT1_IDS(info), \
> >  	INTEL_CFL_U_GT2_IDS(info), \
> > -	INTEL_CFL_U_GT3_IDS(info)
> > +	INTEL_CFL_U_GT3_IDS(info), \
> > +	INTEL_WHL_U_GT1_IDS(info), \
> > +	INTEL_WHL_U_GT2_IDS(info), \
> > +	INTEL_WHL_U_GT3_IDS(info)
> >  
> >  /* CNL */
> >  #define INTEL_CNL_IDS(info) \
> > -- 
> > 2.17.1
> > 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 97a91e6af7e3..92e98773e53d 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -660,9 +660,11 @@  static const struct pci_device_id pciidlist[] = {
 	INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
 	INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
 	INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
-	INTEL_CFL_U_GT1_IDS(&intel_coffeelake_gt1_info),
 	INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
 	INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
+	INTEL_WHL_U_GT1_IDS(&intel_coffeelake_gt1_info),
+	INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
+	INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
 	INTEL_CNL_IDS(&intel_cannonlake_info),
 	INTEL_ICL_11_IDS(&intel_icelake_11_info),
 	{0, 0, 0}
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index bab70ff6e78b..d03350a38025 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -388,32 +388,40 @@ 
 	INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
 	INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
 
-/* CFL U GT1 */
-#define INTEL_CFL_U_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x3EA1, info), \
-	INTEL_VGA_DEVICE(0x3EA4, info)
-
 /* CFL U GT2 */
 #define INTEL_CFL_U_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x3EA0, info), \
-	INTEL_VGA_DEVICE(0x3EA3, info), \
 	INTEL_VGA_DEVICE(0x3EA9, info)
 
 /* CFL U GT3 */
 #define INTEL_CFL_U_GT3_IDS(info) \
-	INTEL_VGA_DEVICE(0x3EA2, info), /* ULT GT3 */ \
 	INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
 	INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
 	INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
 	INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
 
+/* WHL/CFL U GT1 */
+#define INTEL_WHL_U_GT1_IDS(info) \
+	INTEL_VGA_DEVICE(0x3EA1, info)
+
+/* WHL/CFL U GT2 */
+#define INTEL_WHL_U_GT2_IDS(info) \
+	INTEL_VGA_DEVICE(0x3EA0, info)
+
+/* WHL/CFL U GT3 */
+#define INTEL_WHL_U_GT3_IDS(info) \
+	INTEL_VGA_DEVICE(0x3EA2, info), \
+	INTEL_VGA_DEVICE(0x3EA3, info), \
+	INTEL_VGA_DEVICE(0x3EA4, info)
+
 #define INTEL_CFL_IDS(info)	   \
 	INTEL_CFL_S_GT1_IDS(info), \
 	INTEL_CFL_S_GT2_IDS(info), \
 	INTEL_CFL_H_GT2_IDS(info), \
-	INTEL_CFL_U_GT1_IDS(info), \
 	INTEL_CFL_U_GT2_IDS(info), \
-	INTEL_CFL_U_GT3_IDS(info)
+	INTEL_CFL_U_GT3_IDS(info), \
+	INTEL_WHL_U_GT1_IDS(info), \
+	INTEL_WHL_U_GT2_IDS(info), \
+	INTEL_WHL_U_GT3_IDS(info)
 
 /* CNL */
 #define INTEL_CNL_IDS(info) \

[v2,1/2] drm/i915/whl: Introducing Whiskey Lake platform

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