[12/14] drm/i915: Clean up encoder->crtc_mask setup

Message ID	20180615164925.28971-13-ville.syrjala@linux.intel.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <intel-gfx-bounces@lists.freedesktop.org> From: Ville Syrjala <ville.syrjala@linux.intel.com> To: dri-devel@lists.freedesktop.org Date: Fri, 15 Jun 2018 19:49:23 +0300 Message-Id: <20180615164925.28971-13-ville.syrjala@linux.intel.com> In-Reply-To: <20180615164925.28971-1-ville.syrjala@linux.intel.com> References: <20180615164925.28971-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 12/14] drm/i915: Clean up encoder->crtc_mask setup Precedence: list Cc: intel-gfx@lists.freedesktop.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>

Message ID

20180615164925.28971-13-ville.syrjala@linux.intel.com (mailing list archive)

State

New, archived

Headers

From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: dri-devel@lists.freedesktop.org
Date: Fri, 15 Jun 2018 19:49:23 +0300
Message-Id: <20180615164925.28971-13-ville.syrjala@linux.intel.com>
In-Reply-To: <20180615164925.28971-1-ville.syrjala@linux.intel.com>
References: <20180615164925.28971-1-ville.syrjala@linux.intel.com>
MIME-Version: 1.0
Subject: [Intel-gfx] [PATCH 12/14] drm/i915: Clean up encoder->crtc_mask
	setup
Precedence: list
Cc: intel-gfx@lists.freedesktop.org
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Content-Transfer-Encoding: base64
Errors-To: intel-gfx-bounces@lists.freedesktop.org
Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>

Commit Message

Ville Syrjälä June 15, 2018, 4:49 p.m. UTC

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Use BIT(pipe) for better legibility when populating the crtc_mask
for encoders.

Also remove the redundant possible_crtcs setup for the TV encoder.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_crt.c  | 4 ++--
 drivers/gpu/drm/i915/intel_ddi.c  | 2 +-
 drivers/gpu/drm/i915/intel_dp.c   | 6 +++---
 drivers/gpu/drm/i915/intel_dvo.c  | 2 +-
 drivers/gpu/drm/i915/intel_hdmi.c | 6 +++---
 drivers/gpu/drm/i915/intel_lvds.c | 6 +++---
 drivers/gpu/drm/i915/intel_sdvo.c | 2 +-
 drivers/gpu/drm/i915/intel_tv.c   | 3 +--
 8 files changed, 15 insertions(+), 16 deletions(-)

Comments

Jani Nikula June 18, 2018, 6:27 p.m. UTC | #1

On Fri, 15 Jun 2018, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Use BIT(pipe) for better legibility when populating the crtc_mask
> for encoders.
>
> Also remove the redundant possible_crtcs setup for the TV encoder.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/intel_crt.c  | 4 ++--
>  drivers/gpu/drm/i915/intel_ddi.c  | 2 +-
>  drivers/gpu/drm/i915/intel_dp.c   | 6 +++---
>  drivers/gpu/drm/i915/intel_dvo.c  | 2 +-
>  drivers/gpu/drm/i915/intel_hdmi.c | 6 +++---
>  drivers/gpu/drm/i915/intel_lvds.c | 6 +++---
>  drivers/gpu/drm/i915/intel_sdvo.c | 2 +-
>  drivers/gpu/drm/i915/intel_tv.c   | 3 +--
>  8 files changed, 15 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
> index 95aa29cf2d9c..b6b1464a47b2 100644
> --- a/drivers/gpu/drm/i915/intel_crt.c
> +++ b/drivers/gpu/drm/i915/intel_crt.c
> @@ -967,9 +967,9 @@ void intel_crt_init(struct drm_i915_private *dev_priv)
>  	crt->base.type = INTEL_OUTPUT_ANALOG;
>  	crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
>  	if (IS_I830(dev_priv))
> -		crt->base.crtc_mask = (1 << 0);
> +		crt->base.crtc_mask = BIT(PIPE_A);
>  	else
> -		crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> +		crt->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
>  
>  	if (IS_GEN2(dev_priv))
>  		connector->interlace_allowed = 0;
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index ca73387bd596..0462d9b31f7d 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -3514,7 +3514,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
>  	intel_encoder->type = INTEL_OUTPUT_DDI;
>  	intel_encoder->power_domain = intel_port_to_power_domain(port);
>  	intel_encoder->port = port;
> -	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> +	intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
>  	intel_encoder->cloneable = 0;
>  
>  	if (INTEL_GEN(dev_priv) >= 11)
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index a58bac01aeea..d983924ed69a 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -6474,11 +6474,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
>  	intel_encoder->power_domain = intel_port_to_power_domain(port);
>  	if (IS_CHERRYVIEW(dev_priv)) {
>  		if (port == PORT_D)
> -			intel_encoder->crtc_mask = 1 << 2;
> +			intel_encoder->crtc_mask = BIT(PIPE_C);
>  		else
> -			intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
> +			intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
>  	} else {
> -		intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> +		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
>  	}
>  	intel_encoder->cloneable = 0;
>  	intel_encoder->port = port;
> diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
> index 27f16db8953a..27c18680deb4 100644
> --- a/drivers/gpu/drm/i915/intel_dvo.c
> +++ b/drivers/gpu/drm/i915/intel_dvo.c
> @@ -499,7 +499,7 @@ void intel_dvo_init(struct drm_i915_private *dev_priv)
>  		intel_encoder->type = INTEL_OUTPUT_DVO;
>  		intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
>  		intel_encoder->port = port;
> -		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
> +		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
>  
>  		switch (dvo->type) {
>  		case INTEL_DVO_CHIP_TMDS:
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index 09d7d38f0d4e..666bcc1a4660 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -2405,11 +2405,11 @@ void intel_hdmi_init(struct drm_i915_private *dev_priv,
>  	intel_encoder->port = port;
>  	if (IS_CHERRYVIEW(dev_priv)) {
>  		if (port == PORT_D)
> -			intel_encoder->crtc_mask = 1 << 2;
> +			intel_encoder->crtc_mask = BIT(PIPE_C);
>  		else
> -			intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
> +			intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
>  	} else {
> -		intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> +		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
>  	}
>  	intel_encoder->cloneable = 1 << INTEL_OUTPUT_ANALOG;
>  	/*
> diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
> index bb06744d28a4..753df8dd9a03 100644
> --- a/drivers/gpu/drm/i915/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/intel_lvds.c
> @@ -1085,11 +1085,11 @@ void intel_lvds_init(struct drm_i915_private *dev_priv)
>  	intel_encoder->port = PORT_NONE;
>  	intel_encoder->cloneable = 0;
>  	if (HAS_PCH_SPLIT(dev_priv))
> -		intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> +		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
>  	else if (IS_GEN4(dev_priv))
> -		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
> +		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
>  	else
> -		intel_encoder->crtc_mask = (1 << 1);
> +		intel_encoder->crtc_mask = BIT(PIPE_B);
>  
>  	drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
>  	connector->display_info.subpixel_order = SubPixelHorizontalRGB;
> diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
> index e6a64b3ecd91..ef540cf00373 100644
> --- a/drivers/gpu/drm/i915/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/intel_sdvo.c
> @@ -2741,7 +2741,7 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
>  			      bytes[0], bytes[1]);
>  		return false;
>  	}
> -	intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> +	intel_sdvo->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
>  
>  	return true;
>  }
> diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
> index 24dc368fdaa1..7a68c132d08c 100644
> --- a/drivers/gpu/drm/i915/intel_tv.c
> +++ b/drivers/gpu/drm/i915/intel_tv.c
> @@ -1520,9 +1520,8 @@ intel_tv_init(struct drm_i915_private *dev_priv)
>  	intel_encoder->type = INTEL_OUTPUT_TVOUT;
>  	intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
>  	intel_encoder->port = PORT_NONE;
> -	intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
> +	intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
>  	intel_encoder->cloneable = 0;
> -	intel_encoder->base.possible_crtcs = ((1 << 0) | (1 << 1));
>  	intel_tv->type = DRM_MODE_CONNECTOR_Unknown;
>  
>  	/* BIOS margin values */

diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 95aa29cf2d9c..b6b1464a47b2 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -967,9 +967,9 @@  void intel_crt_init(struct drm_i915_private *dev_priv)
 	crt->base.type = INTEL_OUTPUT_ANALOG;
 	crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
 	if (IS_I830(dev_priv))
-		crt->base.crtc_mask = (1 << 0);
+		crt->base.crtc_mask = BIT(PIPE_A);
 	else
-		crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+		crt->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
 
 	if (IS_GEN2(dev_priv))
 		connector->interlace_allowed = 0;
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index ca73387bd596..0462d9b31f7d 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3514,7 +3514,7 @@  void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 	intel_encoder->type = INTEL_OUTPUT_DDI;
 	intel_encoder->power_domain = intel_port_to_power_domain(port);
 	intel_encoder->port = port;
-	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+	intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
 	intel_encoder->cloneable = 0;
 
 	if (INTEL_GEN(dev_priv) >= 11)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index a58bac01aeea..d983924ed69a 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -6474,11 +6474,11 @@  bool intel_dp_init(struct drm_i915_private *dev_priv,
 	intel_encoder->power_domain = intel_port_to_power_domain(port);
 	if (IS_CHERRYVIEW(dev_priv)) {
 		if (port == PORT_D)
-			intel_encoder->crtc_mask = 1 << 2;
+			intel_encoder->crtc_mask = BIT(PIPE_C);
 		else
-			intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
+			intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
 	} else {
-		intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
 	}
 	intel_encoder->cloneable = 0;
 	intel_encoder->port = port;
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index 27f16db8953a..27c18680deb4 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -499,7 +499,7 @@  void intel_dvo_init(struct drm_i915_private *dev_priv)
 		intel_encoder->type = INTEL_OUTPUT_DVO;
 		intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
 		intel_encoder->port = port;
-		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
+		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
 
 		switch (dvo->type) {
 		case INTEL_DVO_CHIP_TMDS:
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 09d7d38f0d4e..666bcc1a4660 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -2405,11 +2405,11 @@  void intel_hdmi_init(struct drm_i915_private *dev_priv,
 	intel_encoder->port = port;
 	if (IS_CHERRYVIEW(dev_priv)) {
 		if (port == PORT_D)
-			intel_encoder->crtc_mask = 1 << 2;
+			intel_encoder->crtc_mask = BIT(PIPE_C);
 		else
-			intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
+			intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
 	} else {
-		intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
 	}
 	intel_encoder->cloneable = 1 << INTEL_OUTPUT_ANALOG;
 	/*
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index bb06744d28a4..753df8dd9a03 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -1085,11 +1085,11 @@  void intel_lvds_init(struct drm_i915_private *dev_priv)
 	intel_encoder->port = PORT_NONE;
 	intel_encoder->cloneable = 0;
 	if (HAS_PCH_SPLIT(dev_priv))
-		intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
 	else if (IS_GEN4(dev_priv))
-		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
+		intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
 	else
-		intel_encoder->crtc_mask = (1 << 1);
+		intel_encoder->crtc_mask = BIT(PIPE_B);
 
 	drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 	connector->display_info.subpixel_order = SubPixelHorizontalRGB;
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index e6a64b3ecd91..ef540cf00373 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -2741,7 +2741,7 @@  intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
 			      bytes[0], bytes[1]);
 		return false;
 	}
-	intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
+	intel_sdvo->base.crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C);
 
 	return true;
 }
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 24dc368fdaa1..7a68c132d08c 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1520,9 +1520,8 @@  intel_tv_init(struct drm_i915_private *dev_priv)
 	intel_encoder->type = INTEL_OUTPUT_TVOUT;
 	intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
 	intel_encoder->port = PORT_NONE;
-	intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
+	intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B);
 	intel_encoder->cloneable = 0;
-	intel_encoder->base.possible_crtcs = ((1 << 0) | (1 << 1));
 	intel_tv->type = DRM_MODE_CONNECTOR_Unknown;
 
 	/* BIOS margin values */

[12/14] drm/i915: Clean up encoder->crtc_mask setup

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