Message ID | 20180626194716.12522-5-ville.syrjala@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Tue, Jun 26, 2018 at 10:47:11PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Use drm_{plane,crtc,encoder,connector}_mask() where appropriate. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > drivers/gpu/drm/i915/intel_display.c | 14 +++++++------- > drivers/gpu/drm/i915/intel_display.h | 4 ++-- > drivers/gpu/drm/i915/intel_dpll_mgr.c | 6 +++--- > 3 files changed, 12 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index eaa0663963a5..7cc70e751c82 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -2756,10 +2756,10 @@ intel_set_plane_visible(struct intel_crtc_state *crtc_state, > > /* FIXME pre-g4x don't work like this */ > if (visible) { > - crtc_state->base.plane_mask |= BIT(drm_plane_index(&plane->base)); > + crtc_state->base.plane_mask |= drm_plane_mask(&plane->base); > crtc_state->active_planes |= BIT(plane->id); > } else { > - crtc_state->base.plane_mask &= ~BIT(drm_plane_index(&plane->base)); > + crtc_state->base.plane_mask &= ~drm_plane_mask(&plane->base); > crtc_state->active_planes &= ~BIT(plane->id); > } > > @@ -11896,7 +11896,7 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv, > struct drm_crtc_state *new_state) > { > struct intel_dpll_hw_state dpll_hw_state; > - unsigned crtc_mask; > + unsigned int crtc_mask; > bool active; > > memset(&dpll_hw_state, 0, sizeof(dpll_hw_state)); > @@ -11923,7 +11923,7 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv, > return; > } > > - crtc_mask = 1 << drm_crtc_index(crtc); > + crtc_mask = drm_crtc_mask(crtc); > > if (new_state->active) > I915_STATE_WARN(!(pll->active_mask & crtc_mask), > @@ -11958,7 +11958,7 @@ verify_shared_dpll_state(struct drm_device *dev, struct drm_crtc *crtc, > > if (old_state->shared_dpll && > old_state->shared_dpll != new_state->shared_dpll) { > - unsigned crtc_mask = 1 << drm_crtc_index(crtc); > + unsigned int crtc_mask = drm_crtc_mask(crtc); > struct intel_shared_dpll *pll = old_state->shared_dpll; > > I915_STATE_WARN(pll->active_mask & crtc_mask, > @@ -15636,9 +15636,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) > * rely on the connector_mask being accurate. > */ > encoder->base.crtc->state->connector_mask |= > - 1 << drm_connector_index(&connector->base); > + drm_connector_mask(&connector->base); > encoder->base.crtc->state->encoder_mask |= > - 1 << drm_encoder_index(&encoder->base); > + drm_encoder_mask(&encoder->base); > } > > } else { > diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h > index dfb02da73ac8..dd30cae5eb00 100644 > --- a/drivers/gpu/drm/i915/intel_display.h > +++ b/drivers/gpu/drm/i915/intel_display.h > @@ -261,7 +261,7 @@ struct intel_link_m_n { > &(dev)->mode_config.plane_list, \ > base.head) \ > for_each_if((plane_mask) & \ > - BIT(drm_plane_index(&intel_plane->base))) > + drm_plane_mask(&intel_plane->base))) > > #define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) \ > list_for_each_entry(intel_plane, \ > @@ -278,7 +278,7 @@ struct intel_link_m_n { > list_for_each_entry(intel_crtc, \ > &(dev)->mode_config.crtc_list, \ > base.head) \ > - for_each_if((crtc_mask) & BIT(drm_crtc_index(&intel_crtc->base))) > + for_each_if((crtc_mask) & drm_crtc_mask(&intel_crtc->base)) > > #define for_each_intel_encoder(dev, intel_encoder) \ > list_for_each_entry(intel_encoder, \ > diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c > index 57342364fd30..e4ac7f980c9e 100644 > --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c > +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c > @@ -163,8 +163,8 @@ void intel_enable_shared_dpll(struct intel_crtc *crtc) > struct drm_device *dev = crtc->base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > struct intel_shared_dpll *pll = crtc->config->shared_dpll; > - unsigned crtc_mask = 1 << drm_crtc_index(&crtc->base); > - unsigned old_mask; > + unsigned int crtc_mask = drm_crtc_mask(&crtc->base); > + unsigned int old_mask; > > if (WARN_ON(pll == NULL)) > return; > @@ -207,7 +207,7 @@ void intel_disable_shared_dpll(struct intel_crtc *crtc) > { > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_shared_dpll *pll = crtc->config->shared_dpll; > - unsigned crtc_mask = 1 << drm_crtc_index(&crtc->base); > + unsigned int crtc_mask = drm_crtc_mask(&crtc->base); > > /* PCH only available on ILK+ */ > if (INTEL_GEN(dev_priv) < 5) > -- > 2.16.4 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index eaa0663963a5..7cc70e751c82 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2756,10 +2756,10 @@ intel_set_plane_visible(struct intel_crtc_state *crtc_state, /* FIXME pre-g4x don't work like this */ if (visible) { - crtc_state->base.plane_mask |= BIT(drm_plane_index(&plane->base)); + crtc_state->base.plane_mask |= drm_plane_mask(&plane->base); crtc_state->active_planes |= BIT(plane->id); } else { - crtc_state->base.plane_mask &= ~BIT(drm_plane_index(&plane->base)); + crtc_state->base.plane_mask &= ~drm_plane_mask(&plane->base); crtc_state->active_planes &= ~BIT(plane->id); } @@ -11896,7 +11896,7 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv, struct drm_crtc_state *new_state) { struct intel_dpll_hw_state dpll_hw_state; - unsigned crtc_mask; + unsigned int crtc_mask; bool active; memset(&dpll_hw_state, 0, sizeof(dpll_hw_state)); @@ -11923,7 +11923,7 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv, return; } - crtc_mask = 1 << drm_crtc_index(crtc); + crtc_mask = drm_crtc_mask(crtc); if (new_state->active) I915_STATE_WARN(!(pll->active_mask & crtc_mask), @@ -11958,7 +11958,7 @@ verify_shared_dpll_state(struct drm_device *dev, struct drm_crtc *crtc, if (old_state->shared_dpll && old_state->shared_dpll != new_state->shared_dpll) { - unsigned crtc_mask = 1 << drm_crtc_index(crtc); + unsigned int crtc_mask = drm_crtc_mask(crtc); struct intel_shared_dpll *pll = old_state->shared_dpll; I915_STATE_WARN(pll->active_mask & crtc_mask, @@ -15636,9 +15636,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) * rely on the connector_mask being accurate. */ encoder->base.crtc->state->connector_mask |= - 1 << drm_connector_index(&connector->base); + drm_connector_mask(&connector->base); encoder->base.crtc->state->encoder_mask |= - 1 << drm_encoder_index(&encoder->base); + drm_encoder_mask(&encoder->base); } } else { diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h index dfb02da73ac8..dd30cae5eb00 100644 --- a/drivers/gpu/drm/i915/intel_display.h +++ b/drivers/gpu/drm/i915/intel_display.h @@ -261,7 +261,7 @@ struct intel_link_m_n { &(dev)->mode_config.plane_list, \ base.head) \ for_each_if((plane_mask) & \ - BIT(drm_plane_index(&intel_plane->base))) + drm_plane_mask(&intel_plane->base))) #define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) \ list_for_each_entry(intel_plane, \ @@ -278,7 +278,7 @@ struct intel_link_m_n { list_for_each_entry(intel_crtc, \ &(dev)->mode_config.crtc_list, \ base.head) \ - for_each_if((crtc_mask) & BIT(drm_crtc_index(&intel_crtc->base))) + for_each_if((crtc_mask) & drm_crtc_mask(&intel_crtc->base)) #define for_each_intel_encoder(dev, intel_encoder) \ list_for_each_entry(intel_encoder, \ diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c index 57342364fd30..e4ac7f980c9e 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c @@ -163,8 +163,8 @@ void intel_enable_shared_dpll(struct intel_crtc *crtc) struct drm_device *dev = crtc->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); struct intel_shared_dpll *pll = crtc->config->shared_dpll; - unsigned crtc_mask = 1 << drm_crtc_index(&crtc->base); - unsigned old_mask; + unsigned int crtc_mask = drm_crtc_mask(&crtc->base); + unsigned int old_mask; if (WARN_ON(pll == NULL)) return; @@ -207,7 +207,7 @@ void intel_disable_shared_dpll(struct intel_crtc *crtc) { struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_shared_dpll *pll = crtc->config->shared_dpll; - unsigned crtc_mask = 1 << drm_crtc_index(&crtc->base); + unsigned int crtc_mask = drm_crtc_mask(&crtc->base); /* PCH only available on ILK+ */ if (INTEL_GEN(dev_priv) < 5)