| Message ID | 20180707100405.817-1-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Chris Wilson <chris@chris-wilson.co.uk> writes: > i915g has a slightly different tiling layout, and so requires a > different reference swizzle pattern. > > Testcase: igt/drv_selftests/live_objects #gdg > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> > --- > drivers/gpu/drm/i915/selftests/i915_gem_object.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/selftests/i915_gem_object.c > index 25c2b2d433bd..f4a5099c75b5 100644 > --- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c > +++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c > @@ -169,9 +169,16 @@ static u64 tiled_offset(const struct tile *tile, u64 v) > v += y * tile->width; > v += div64_u64_rem(x, tile->width, &x) << tile->size; > v += x; > - } else { > + } else if (tile->width == 128) { > const unsigned int ytile_span = 16; > - const unsigned int ytile_height = 32 * ytile_span; > + const unsigned int ytile_height = 512; > + > + v += y * ytile_span; > + v += div64_u64_rem(x, ytile_span, &x) * ytile_height; > + v += x; > + } else { > + const unsigned int ytile_span = 32; > + const unsigned int ytile_height = 256; > > v += y * ytile_span; > v += div64_u64_rem(x, ytile_span, &x) * ytile_height; > -- > 2.18.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Quoting Mika Kuoppala (2018-07-09 10:57:19) > Chris Wilson <chris@chris-wilson.co.uk> writes: > > > i915g has a slightly different tiling layout, and so requires a > > different reference swizzle pattern. > > > > Testcase: igt/drv_selftests/live_objects #gdg > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > > Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Ta, and welcome back \o/ -Chris
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/selftests/i915_gem_object.c index 25c2b2d433bd..f4a5099c75b5 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c @@ -169,9 +169,16 @@ static u64 tiled_offset(const struct tile *tile, u64 v) v += y * tile->width; v += div64_u64_rem(x, tile->width, &x) << tile->size; v += x; - } else { + } else if (tile->width == 128) { const unsigned int ytile_span = 16; - const unsigned int ytile_height = 32 * ytile_span; + const unsigned int ytile_height = 512; + + v += y * ytile_span; + v += div64_u64_rem(x, ytile_span, &x) * ytile_height; + v += x; + } else { + const unsigned int ytile_span = 32; + const unsigned int ytile_height = 256; v += y * ytile_span; v += div64_u64_rem(x, ytile_span, &x) * ytile_height;
i915g has a slightly different tiling layout, and so requires a different reference swizzle pattern. Testcase: igt/drv_selftests/live_objects #gdg Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/selftests/i915_gem_object.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-)