| Message ID | 20180711215909.23945-5-paulo.r.zanoni@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
>-----Original Message----- >From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of >Paulo Zanoni >Sent: Wednesday, July 11, 2018 2:59 PM >To: intel-gfx@lists.freedesktop.org >Cc: Zanoni, Paulo R <paulo.r.zanoni@intel.com> >Subject: [Intel-gfx] [PATCH 4/8] drm/i915/icl: implement the tc/legacy HPD {dis, >}connect flow for DP > >Implement the DFLEXDPPMS/DFLEXDPCSSS dance for DisplayPort. These >functions need to be called during HPD assert/deassert, but due to how our driver >works it's much simpler if we always call them when >icl_digital_port_connected() is called, which means we won't call them exactly >once per HPD event. This should also cover the connected boot case, whatever >the BIOS does. > >We're still missing the HDMI case, which should be implemented in the next >patch. > >Also notice that, today, the BSpec pages for the DFLEXDPPMS and DFLEXDPCSSS >registers are wrong, so you should only trust the flows described by the "Gen11 >TypeC Programming" page in our spec. > >Cc: Animesh Manna <animesh.manna@intel.com> >Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> >--- > drivers/gpu/drm/i915/i915_reg.h | 6 +++++ drivers/gpu/drm/i915/intel_dp.c | >57 ++++++++++++++++++++++++++++++++++++++++- > 2 files changed, 62 insertions(+), 1 deletion(-) > >diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h >index c1f350469ff6..96f590a22b26 100644 >--- a/drivers/gpu/drm/i915/i915_reg.h >+++ b/drivers/gpu/drm/i915/i915_reg.h >@@ -10223,4 +10223,10 @@ enum skl_power_gate { > _ICL_PHY_MISC_B) > #define ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN (1 << 23) > >+#define PORT_TX_DFLEXDPPMS > _MMIO(0x163890) >+#define DP_PHY_MODE_STATUS_COMPLETED(tc_port) (1 << >(tc_port)) >+ >+#define PORT_TX_DFLEXDPCSSS > _MMIO(0x163894) >+#define DP_PHY_MODE_STATUS_NOT_SAFE(tc_port) (1 << (tc_port)) >+ > #endif /* _I915_REG_H_ */ >diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c >index 486b879cdef7..0ebce7e4c538 100644 >--- a/drivers/gpu/drm/i915/intel_dp.c >+++ b/drivers/gpu/drm/i915/intel_dp.c >@@ -4784,6 +4784,56 @@ static void icl_update_tc_port_type(struct >drm_i915_private *dev_priv, > type_str); > } > >+static bool icl_tc_phy_mode_status_connect(struct drm_i915_private *dev_priv, >+ struct intel_digital_port *dig_port) { >+ enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port); >+ u32 val; >+ >+ if (dig_port->tc_type != TC_PORT_LEGACY && >+ dig_port->tc_type != TC_PORT_TYPEC) >+ return true; >+ >+ val = I915_READ(PORT_TX_DFLEXDPPMS); >+ if (!(val & DP_PHY_MODE_STATUS_COMPLETED(tc_port))) { >+ DRM_ERROR("DP PHY for TC port %d not ready\n", tc_port); >+ return false; >+ } >+ >+ /* >+ * This function may be called many times in a row without an HPD event >+ * in between, so try to avoid the write when we can. >+ */ >+ val = I915_READ(PORT_TX_DFLEXDPCSSS); >+ if (!(val & DP_PHY_MODE_STATUS_NOT_SAFE(tc_port))) { >+ val |= DP_PHY_MODE_STATUS_NOT_SAFE(tc_port); >+ I915_WRITE(PORT_TX_DFLEXDPCSSS, val); >+ } >+ >+ return true; >+} >+ >+static void icl_tc_phy_mode_status_disconnect(struct drm_i915_private >*dev_priv, >+ struct intel_digital_port *dig_port) { >+ enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port); >+ u32 val; >+ >+ if (dig_port->tc_type != TC_PORT_LEGACY && >+ dig_port->tc_type != TC_PORT_TYPEC) >+ return; >+ >+ /* >+ * This function may be called many times in a row without an HPD event >+ * in between, so try to avoid the write when we can. >+ */ >+ val = I915_READ(PORT_TX_DFLEXDPCSSS); >+ if (val & DP_PHY_MODE_STATUS_NOT_SAFE(tc_port)) { >+ val &= ~DP_PHY_MODE_STATUS_NOT_SAFE(tc_port); >+ I915_WRITE(PORT_TX_DFLEXDPCSSS, val); >+ } >+} >+ > static bool icl_tc_port_connected(struct drm_i915_private *dev_priv, > struct intel_digital_port *intel_dig_port) { @@ >-4804,12 +4854,17 @@ static bool icl_tc_port_connected(struct >drm_i915_private *dev_priv, > if (cpu_isr & tbt_bit) > is_tbt = true; > >- if (!is_legacy && !is_typec && !is_tbt) >+ if (!is_legacy && !is_typec && !is_tbt) { >+ icl_tc_phy_mode_status_disconnect(dev_priv, intel_dig_port); > return false; >+ } > > icl_update_tc_port_type(dev_priv, intel_dig_port, is_legacy, is_typec, > is_tbt); > >+ if (!icl_tc_phy_mode_status_connect(dev_priv, intel_dig_port)) >+ return false; >+ > return true; > } > >-- >2.14.4 > >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@lists.freedesktop.org >https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c1f350469ff6..96f590a22b26 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -10223,4 +10223,10 @@ enum skl_power_gate { _ICL_PHY_MISC_B) #define ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN (1 << 23) +#define PORT_TX_DFLEXDPPMS _MMIO(0x163890) +#define DP_PHY_MODE_STATUS_COMPLETED(tc_port) (1 << (tc_port)) + +#define PORT_TX_DFLEXDPCSSS _MMIO(0x163894) +#define DP_PHY_MODE_STATUS_NOT_SAFE(tc_port) (1 << (tc_port)) + #endif /* _I915_REG_H_ */ diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 486b879cdef7..0ebce7e4c538 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -4784,6 +4784,56 @@ static void icl_update_tc_port_type(struct drm_i915_private *dev_priv, type_str); } +static bool icl_tc_phy_mode_status_connect(struct drm_i915_private *dev_priv, + struct intel_digital_port *dig_port) +{ + enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port); + u32 val; + + if (dig_port->tc_type != TC_PORT_LEGACY && + dig_port->tc_type != TC_PORT_TYPEC) + return true; + + val = I915_READ(PORT_TX_DFLEXDPPMS); + if (!(val & DP_PHY_MODE_STATUS_COMPLETED(tc_port))) { + DRM_ERROR("DP PHY for TC port %d not ready\n", tc_port); + return false; + } + + /* + * This function may be called many times in a row without an HPD event + * in between, so try to avoid the write when we can. + */ + val = I915_READ(PORT_TX_DFLEXDPCSSS); + if (!(val & DP_PHY_MODE_STATUS_NOT_SAFE(tc_port))) { + val |= DP_PHY_MODE_STATUS_NOT_SAFE(tc_port); + I915_WRITE(PORT_TX_DFLEXDPCSSS, val); + } + + return true; +} + +static void icl_tc_phy_mode_status_disconnect(struct drm_i915_private *dev_priv, + struct intel_digital_port *dig_port) +{ + enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port); + u32 val; + + if (dig_port->tc_type != TC_PORT_LEGACY && + dig_port->tc_type != TC_PORT_TYPEC) + return; + + /* + * This function may be called many times in a row without an HPD event + * in between, so try to avoid the write when we can. + */ + val = I915_READ(PORT_TX_DFLEXDPCSSS); + if (val & DP_PHY_MODE_STATUS_NOT_SAFE(tc_port)) { + val &= ~DP_PHY_MODE_STATUS_NOT_SAFE(tc_port); + I915_WRITE(PORT_TX_DFLEXDPCSSS, val); + } +} + static bool icl_tc_port_connected(struct drm_i915_private *dev_priv, struct intel_digital_port *intel_dig_port) { @@ -4804,12 +4854,17 @@ static bool icl_tc_port_connected(struct drm_i915_private *dev_priv, if (cpu_isr & tbt_bit) is_tbt = true; - if (!is_legacy && !is_typec && !is_tbt) + if (!is_legacy && !is_typec && !is_tbt) { + icl_tc_phy_mode_status_disconnect(dev_priv, intel_dig_port); return false; + } icl_update_tc_port_type(dev_priv, intel_dig_port, is_legacy, is_typec, is_tbt); + if (!icl_tc_phy_mode_status_connect(dev_priv, intel_dig_port)) + return false; + return true; }
Implement the DFLEXDPPMS/DFLEXDPCSSS dance for DisplayPort. These functions need to be called during HPD assert/deassert, but due to how our driver works it's much simpler if we always call them when icl_digital_port_connected() is called, which means we won't call them exactly once per HPD event. This should also cover the connected boot case, whatever the BIOS does. We're still missing the HDMI case, which should be implemented in the next patch. Also notice that, today, the BSpec pages for the DFLEXDPPMS and DFLEXDPCSSS registers are wrong, so you should only trust the flows described by the "Gen11 TypeC Programming" page in our spec. Cc: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 6 +++++ drivers/gpu/drm/i915/intel_dp.c | 57 ++++++++++++++++++++++++++++++++++++++++- 2 files changed, 62 insertions(+), 1 deletion(-)