From patchwork Fri Jul 13 14:11:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kumar, Mahesh" X-Patchwork-Id: 10523415 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 693FE6032C for ; Fri, 13 Jul 2018 14:09:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 59416298AD for ; Fri, 13 Jul 2018 14:09:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4D93C298E8; Fri, 13 Jul 2018 14:09:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E2C67298AD for ; Fri, 13 Jul 2018 14:09:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 538C16F26B; Fri, 13 Jul 2018 14:09:53 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id B6C4E6F264 for ; Fri, 13 Jul 2018 14:09:50 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jul 2018 07:09:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,347,1526367600"; d="scan'208";a="215756202" Received: from unknown (HELO localhost.localdomain) ([10.223.25.241]) by orsmga004.jf.intel.com with ESMTP; 13 Jul 2018 07:09:48 -0700 From: Mahesh Kumar To: intel-gfx@lists.freedesktop.org Date: Fri, 13 Jul 2018 19:41:24 +0530 Message-Id: <20180713141124.25350-4-mahesh1.kumar@intel.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180713141124.25350-1-mahesh1.kumar@intel.com> References: <20180713141124.25350-1-mahesh1.kumar@intel.com> Subject: [Intel-gfx] [PATCH 3/3] drm/i915: Implement 16GB dimm wa for latency level-0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Memory with 16GB dimms require an increase of 1us in level-0 latency. This patch implements the same. Bspec: 4381 Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/i915_drv.c | 35 +++++++++++++++++++++++++++++++++-- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_pm.c | 13 +++++++++++++ 3 files changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index b93194cbd820..c6d30653d70c 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1063,6 +1063,29 @@ static void intel_sanitize_options(struct drm_i915_private *dev_priv) intel_gvt_sanitize_options(dev_priv); } +static void +intel_memdev_is_16gb_dimm(struct memdev_info *memdev_info, + u8 rank, u8 size, u8 width) +{ + bool found_16gb_dimm = false; + + if (size == 16 && width == SKL_DRAM_WIDTH_X8 && + rank == SKL_DRAM_RANK_SINGLE) + found_16gb_dimm = true; + else if (size == 32 && width == SKL_DRAM_WIDTH_X8 && + rank == SKL_DRAM_RANK_DUAL) + found_16gb_dimm = true; + else if (size == 8 && width == SKL_DRAM_WIDTH_X16 && + rank == SKL_DRAM_RANK_SINGLE) + found_16gb_dimm = true; + else if (size == 16 && width == SKL_DRAM_WIDTH_X16 && + rank == SKL_DRAM_RANK_DUAL) + found_16gb_dimm = true; + + if (!memdev_info->is_16gb_dimm) + memdev_info->is_16gb_dimm = found_16gb_dimm; +} + static enum memdev_rank skl_memdev_get_channel_rank(struct memdev_info *memdev_info, u32 val) { @@ -1084,6 +1107,8 @@ skl_memdev_get_channel_rank(struct memdev_info *memdev_info, u32 val) if (l_size == 0 && s_size == 0) return I915_DRAM_RANK_INVALID; + memdev_info->valid_dimm = true; + DRM_DEBUG_KMS("(size:width:rank) L(%dGB:X%d:%s) S(%dGB:X%d:%s)\n", l_size, (1 << l_width) * 8, l_rank ? "dual" : "single", s_size, (1 << s_width) * 8, s_rank ? "dual" : "single"); @@ -1096,6 +1121,9 @@ skl_memdev_get_channel_rank(struct memdev_info *memdev_info, u32 val) else rank = I915_DRAM_RANK_SINGLE; + intel_memdev_is_16gb_dimm(memdev_info, l_rank, l_size, l_width); + intel_memdev_is_16gb_dimm(memdev_info, s_rank, s_size, s_width); + return rank; } @@ -1247,6 +1275,7 @@ bxt_get_memdev_info(struct drm_i915_private *dev_priv) return -EINVAL; } + memdev_info->valid_dimm = true; memdev_info->valid = true; return 0; } @@ -1259,6 +1288,8 @@ intel_get_memdev_info(struct drm_i915_private *dev_priv) int ret; memdev_info->valid = false; + memdev_info->valid_dimm = false; + memdev_info->is_16gb_dimm = false; memdev_info->rank = I915_DRAM_RANK_INVALID; memdev_info->bandwidth_kbps = 0; memdev_info->num_channels = 0; @@ -1282,9 +1313,9 @@ intel_get_memdev_info(struct drm_i915_private *dev_priv) sprintf(bandwidth_str, "unknown"); DRM_DEBUG_KMS("DRAM bandwidth:%s, total-channels: %u\n", bandwidth_str, memdev_info->num_channels); - DRM_DEBUG_KMS("DRAM rank: %s rank\n", + DRM_DEBUG_KMS("DRAM rank: %s rank 16GB-dimm:%s\n", (memdev_info->rank == I915_DRAM_RANK_DUAL) ? - "dual" : "single"); + "dual" : "single", yesno(memdev_info->is_16gb_dimm)); } /** diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 845447d3806a..244adf8a30f1 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1914,6 +1914,8 @@ struct drm_i915_private { struct memdev_info { bool valid; + bool valid_dimm; + bool is_16gb_dimm; u8 num_channels; enum memdev_rank { I915_DRAM_RANK_INVALID = 0, diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 53aaaa3e6886..f20f2f9118df 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2874,6 +2874,19 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv, } } + /* + * WA Level-0 adjustment for 16GB DIMMs: SKL+ + * If we could not get dimm info enable this WA to prevent from + * any underrun. If not able to get Dimm info assume 16GB dimm + * to avoid any underrun. + */ + if (dev_priv->memdev_info.valid_dimm) { + if (dev_priv->memdev_info.is_16gb_dimm) + wm[0] += 1; + } else { + wm[0] += 1; + } + } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { uint64_t sskpd = I915_READ64(MCH_SSKPD);