diff mbox

drm/i915/execlists: Always clear preempt status on cancelling all

Message ID 20180716104727.2625-1-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show

Commit Message

Chris Wilson July 16, 2018, 10:47 a.m. UTC
On reset/wedging, we cancel all pending replies from the HW and we also
want to cancel an outstanding preemption event. Since we use the same
function to cancel the pending replies for reset and for a preemption
event, we can simply clear the active tracking for all.

v2: Keep execlists_user_end() markup for wedging

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
Email woes, so resending so we Tvrtko can ask his questions again.

The reason why I didn't use multiple execlists_clear_active() was
because there are multiple bits, and will be extended in future, that
gcc doesn't optimise well because they are being tweaked inside asm
volatile (and so untouched by gcc).

Keeping the user_end() is for later, where it means more than just
clearing the bit but is acted on for disabling RPS and the like.
-Chris
---
 drivers/gpu/drm/i915/intel_guc_submission.c | 2 --
 drivers/gpu/drm/i915/intel_lrc.c            | 5 ++---
 2 files changed, 2 insertions(+), 5 deletions(-)

Comments

Chris Wilson July 16, 2018, 10:59 a.m. UTC | #1
Quoting Chris Wilson (2018-07-16 11:47:27)
> On reset/wedging, we cancel all pending replies from the HW and we also
> want to cancel an outstanding preemption event. Since we use the same
> function to cancel the pending replies for reset and for a preemption
> event, we can simply clear the active tracking for all.
> 
> v2: Keep execlists_user_end() markup for wedging
> 

Fixes: 60a943245413 ("drm/i915/execlists: Drop clear_gtiir() on GPU reset")

> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
index cc444dc5f3ad..94d0674ea3c6 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -633,8 +633,6 @@  static void complete_preempt_context(struct intel_engine_cs *engine)
 
 	wait_for_guc_preempt_report(engine);
 	intel_write_status_page(engine, I915_GEM_HWS_PREEMPT_INDEX, 0);
-
-	execlists_clear_active(execlists, EXECLISTS_ACTIVE_PREEMPT);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 6fef9d130d55..1fe5481470c3 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -563,8 +563,6 @@  static void complete_preempt_context(struct intel_engine_execlists *execlists)
 	__unwind_incomplete_requests(container_of(execlists,
 						  struct intel_engine_cs,
 						  execlists));
-
-	execlists_clear_active(execlists, EXECLISTS_ACTIVE_PREEMPT);
 }
 
 static void execlists_dequeue(struct intel_engine_cs *engine)
@@ -792,7 +790,7 @@  execlists_cancel_port_requests(struct intel_engine_execlists * const execlists)
 		port++;
 	}
 
-	execlists_user_end(execlists);
+	execlists->active = 0;
 }
 
 static void reset_csb_pointers(struct intel_engine_execlists *execlists)
@@ -843,6 +841,7 @@  static void execlists_cancel_requests(struct intel_engine_cs *engine)
 
 	/* Cancel the requests on the HW and clear the ELSP tracker. */
 	execlists_cancel_port_requests(execlists);
+	execlists_user_end(execlists);
 
 	/* Mark all executing requests as skipped. */
 	list_for_each_entry(rq, &engine->timeline.requests, link) {