From patchwork Fri Jul 20 14:15:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 10537579 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 1C90D60547 for ; Fri, 20 Jul 2018 14:16:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0040629555 for ; Fri, 20 Jul 2018 14:16:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E8FD22959F; Fri, 20 Jul 2018 14:16:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 97A5D29555 for ; Fri, 20 Jul 2018 14:16:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C26286F00B; Fri, 20 Jul 2018 14:16:11 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 852996F006 for ; Fri, 20 Jul 2018 14:16:06 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Jul 2018 07:16:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,379,1526367600"; d="scan'208";a="68544823" Received: from ideak-desk.fi.intel.com ([10.237.72.61]) by orsmga003.jf.intel.com with ESMTP; 20 Jul 2018 07:16:04 -0700 From: Imre Deak To: intel-gfx@lists.freedesktop.org Date: Fri, 20 Jul 2018 17:15:03 +0300 Message-Id: <20180720141504.22832-10-imre.deak@intel.com> X-Mailer: git-send-email 2.13.2 In-Reply-To: <20180720141504.22832-1-imre.deak@intel.com> References: <20180720141504.22832-1-imre.deak@intel.com> Subject: [Intel-gfx] [PATCH 09/10] drm/i915: Use existing power well IDs where possible X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula , Paulo Zanoni MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP There is no need for separate IDs for power wells on a new platform with the same functionality as an other power well on a previous platform, we can just reuse the ID from the previous platform. This is only possible after the previous patches where we removed dependence on the actual enum values. Cc: Ville Syrjala Cc: Paulo Zanoni Cc: Jani Nikula Signed-off-by: Imre Deak Reviewed-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_reg.h | 3 --- drivers/gpu/drm/i915/intel_runtime_pm.c | 12 ++++++------ 2 files changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index b6076f712db5..19b4eac1cc8a 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1045,9 +1045,6 @@ enum i915_power_well_id { SKL_DISP_PW_MISC_IO, SKL_DISP_PW_1, SKL_DISP_PW_2, - BXT_DPIO_CMN_BC, - ICL_DISP_PW_1, - ICL_DISP_PW_2, }; #define PUNIT_REG_PWRGT_CTRL 0x60 diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 56161d0dc3ca..b7acf54d8a72 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -772,7 +772,7 @@ static void bxt_verify_ddi_phy_power_wells(struct drm_i915_private *dev_priv) if (power_well->count > 0) bxt_ddi_phy_verify_state(dev_priv, power_well->desc->bxt.phy); - power_well = lookup_power_well(dev_priv, BXT_DPIO_CMN_BC); + power_well = lookup_power_well(dev_priv, VLV_DISP_PW_DPIO_CMN_BC); if (power_well->count > 0) bxt_ddi_phy_verify_state(dev_priv, power_well->desc->bxt.phy); @@ -2456,7 +2456,7 @@ static const struct i915_power_well_desc bxt_power_wells[] = { .name = "dpio-common-bc", .domains = BXT_DPIO_CMN_BC_POWER_DOMAINS, .ops = &bxt_dpio_cmn_power_well_ops, - .id = BXT_DPIO_CMN_BC, + .id = VLV_DISP_PW_DPIO_CMN_BC, { .bxt.phy = DPIO_PHY0, }, @@ -2515,7 +2515,7 @@ static const struct i915_power_well_desc glk_power_wells[] = { .name = "dpio-common-b", .domains = GLK_DPIO_CMN_B_POWER_DOMAINS, .ops = &bxt_dpio_cmn_power_well_ops, - .id = BXT_DPIO_CMN_BC, + .id = VLV_DISP_PW_DPIO_CMN_BC, { .bxt.phy = DPIO_PHY0, }, @@ -2764,7 +2764,7 @@ static const struct i915_power_well_desc icl_power_wells[] = { /* Handled by the DMC firmware */ .domains = 0, .ops = &hsw_power_well_ops, - .id = ICL_DISP_PW_1, + .id = SKL_DISP_PW_1, { .hsw.regs = &hsw_power_well_regs, .hsw.idx = ICL_PW_CTL_IDX_PW_1, @@ -3584,7 +3584,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv, * The AUX IO power wells will be enabled on demand. */ mutex_lock(&power_domains->lock); - well = lookup_power_well(dev_priv, ICL_DISP_PW_1); + well = lookup_power_well(dev_priv, SKL_DISP_PW_1); intel_power_well_enable(dev_priv, well); mutex_unlock(&power_domains->lock); @@ -3625,7 +3625,7 @@ static void icl_display_core_uninit(struct drm_i915_private *dev_priv) * disabled at this point. */ mutex_lock(&power_domains->lock); - well = lookup_power_well(dev_priv, ICL_DISP_PW_1); + well = lookup_power_well(dev_priv, SKL_DISP_PW_1); intel_power_well_disable(dev_priv, well); mutex_unlock(&power_domains->lock);