From patchwork Tue Jul 31 13:35:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maarten Lankhorst X-Patchwork-Id: 10550799 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 125CA14E0 for ; Tue, 31 Jul 2018 13:37:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 011392A91C for ; Tue, 31 Jul 2018 13:37:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E705B2ADB2; Tue, 31 Jul 2018 13:37:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 935E02A91C for ; Tue, 31 Jul 2018 13:37:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1324389BF5; Tue, 31 Jul 2018 13:37:18 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mblankhorst.nl (mblankhorst.nl [141.105.120.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1699D6E206 for ; Tue, 31 Jul 2018 13:36:07 +0000 (UTC) From: Maarten Lankhorst To: intel-gfx@lists.freedesktop.org Date: Tue, 31 Jul 2018 15:35:59 +0200 Message-Id: <20180731133559.6892-2-maarten.lankhorst@linux.intel.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180731133559.6892-1-maarten.lankhorst@linux.intel.com> References: <1532755389.7639.59.camel@intel.com> <20180731133559.6892-1-maarten.lankhorst@linux.intel.com> Subject: [Intel-gfx] [PATCH 2/2] drm/i915/psr: Add debugfs support to force toggling PSR1/2 mode. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Dhinakaran Pandiyan MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This will make it easier to test PSR1 on PSR2 capable eDP machines. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_psr.c | 27 ++++++++++++++++++++++++--- 2 files changed, 26 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ef04b6cd7863..07783b9e7960 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -617,6 +617,8 @@ struct i915_psr { #define I915_PSR_DEBUG_DEFAULT (0 << 1) #define I915_PSR_DEBUG_DISABLE (1 << 1) #define I915_PSR_DEBUG_ENABLE (2 << 1) +#define I915_PSR_DEBUG_FORCE_PSR1 (3 << 1) +#define I915_PSR_DEBUG_FORCE_PSR2 (4 << 1) u32 debug; bool sink_support; diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 7848829094ca..4cf4ac7068d0 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -813,19 +813,38 @@ static bool __psr_wait_for_idle_locked(struct drm_i915_private *dev_priv) return err == 0 && dev_priv->psr.enabled; } +static bool switching_psr(struct drm_i915_private *dev_priv, + struct intel_crtc_state *crtc_state, + u32 mode) +{ + /* Can't switch psr state anyway if PSR2 is not supported. */ + if (!crtc_state || !crtc_state->has_psr2) + return false; + + if (dev_priv->psr.psr2_enabled && mode == I915_PSR_DEBUG_FORCE_PSR1) + return true; + + if (!dev_priv->psr.psr2_enabled && mode != I915_PSR_DEBUG_FORCE_PSR1) + return true; + + return false; +} + int intel_psr_set_debugfs_mode(struct drm_i915_private *dev_priv, struct drm_modeset_acquire_ctx *ctx, u64 val) { struct drm_device *dev = &dev_priv->drm; struct drm_connector_state *conn_state; + struct intel_crtc_state *crtc_state = NULL; struct drm_crtc *crtc; struct intel_dp *dp; int ret; bool enable; + u32 mode = val & I915_PSR_DEBUG_MODE_MASK; if (val & ~(I915_PSR_DEBUG_IRQ | I915_PSR_DEBUG_MODE_MASK) || - (val & I915_PSR_DEBUG_MODE_MASK) > I915_PSR_DEBUG_ENABLE) { + mode > I915_PSR_DEBUG_FORCE_PSR2) { DRM_DEBUG_KMS("Invalid debug mask %llx\n", val); return -EINVAL; } @@ -843,7 +862,8 @@ int intel_psr_set_debugfs_mode(struct drm_i915_private *dev_priv, if (ret) return ret; - ret = wait_for_completion_interruptible(&crtc->state->commit->hw_done); + crtc_state = to_intel_crtc_state(crtc->state); + ret = wait_for_completion_interruptible(&crtc_state->base.commit->hw_done); } else ret = wait_for_completion_interruptible(&conn_state->commit->hw_done); @@ -856,10 +876,11 @@ int intel_psr_set_debugfs_mode(struct drm_i915_private *dev_priv, enable = psr_global_enabled(val); - if (!enable) + if (!enable || switching_psr(dev_priv, crtc_state, mode)) intel_psr_disable_locked(dev_priv->psr.dp); dev_priv->psr.debug = val; + dev_priv->psr.psr2_enabled = mode != I915_PSR_DEBUG_FORCE_PSR1 && crtc_state->has_psr2; intel_psr_irq_control(dev_priv, dev_priv->psr.debug & I915_PSR_DEBUG_IRQ); if (dev_priv->psr.prepared && enable)