| Message ID | 20180801104721.4030-1-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i95: Mark GGTT as incoherent for gen10+ | expand |
Chris Wilson <chris@chris-wilson.co.uk> writes: > The evidence suggests that we need to start treating writes via GGTT as > incoherent for gen10+, that is that they are internally buffered and not > immediately visible via a read along a different physical path. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107398 > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107400 Looks like it. And we don't have better explanations at this point. Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_pci.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index e443fe44da3a..adf80563d0a1 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -590,6 +590,7 @@ static const struct intel_device_info intel_coffeelake_gt3_info = { > GEN9_FEATURES, \ > GEN(10), \ > .ddb_size = 1024, \ > + .has_coherent_ggtt = false, \ > GLK_COLORS > > static const struct intel_device_info intel_cannonlake_info = { > -- > 2.18.0
Quoting Mika Kuoppala (2018-08-01 14:08:33) > Chris Wilson <chris@chris-wilson.co.uk> writes: > > > The evidence suggests that we need to start treating writes via GGTT as > > incoherent for gen10+, that is that they are internally buffered and not > > immediately visible via a read along a different physical path. > > > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107398 > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107400 > > Looks like it. And we don't have better explanations at this point. > > Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Applied, err on the side of safety. We can try setting it to true later and see how it fares then. -Chris
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index e443fe44da3a..adf80563d0a1 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -590,6 +590,7 @@ static const struct intel_device_info intel_coffeelake_gt3_info = { GEN9_FEATURES, \ GEN(10), \ .ddb_size = 1024, \ + .has_coherent_ggtt = false, \ GLK_COLORS static const struct intel_device_info intel_cannonlake_info = {
The evidence suggests that we need to start treating writes via GGTT as incoherent for gen10+, that is that they are internally buffered and not immediately visible via a read along a different physical path. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107398 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107400 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 1 + 1 file changed, 1 insertion(+)