diff mbox series

[2/4] drm/i915: Unconditionally clear the pm/guc GT IIR upon acking

Message ID 20180802100631.31305-2-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show
Series [1/4] drm/i915: Drop stray clearing of rps->last_adj | expand

Commit Message

Chris Wilson Aug. 2, 2018, 10:06 a.m. UTC
Having stored the IIR for action, we should always clear it.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

Comments

Mika Kuoppala Aug. 3, 2018, 1:56 p.m. UTC | #1
Chris Wilson <chris@chris-wilson.co.uk> writes:

> Having stored the IIR for action, we should always clear it.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>

As getting stray unexpected intrs usually is
driver vs hw misconfiguration, should we at some point
start to complain if we see one?

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_irq.c | 7 ++-----
>  1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 90628a47ae17..e37e3ec22a79 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1534,11 +1534,8 @@ static void gen8_gt_irq_ack(struct drm_i915_private *i915,
>  
>  	if (master_ctl & (GEN8_GT_PM_IRQ | GEN8_GT_GUC_IRQ)) {
>  		gt_iir[2] = raw_reg_read(regs, GEN8_GT_IIR(2));
> -		if (likely(gt_iir[2] & (i915->pm_rps_events |
> -					i915->pm_guc_events)))
> -			raw_reg_write(regs, GEN8_GT_IIR(2),
> -				      gt_iir[2] & (i915->pm_rps_events |
> -						   i915->pm_guc_events));
> +		if (likely(gt_iir[2]))
> +			raw_reg_write(regs, GEN8_GT_IIR(2), gt_iir[2]);
>  	}
>  
>  	if (master_ctl & GEN8_GT_VECS_IRQ) {
> -- 
> 2.18.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Chris Wilson Aug. 3, 2018, 2:19 p.m. UTC | #2
Quoting Mika Kuoppala (2018-08-03 14:56:54)
> Chris Wilson <chris@chris-wilson.co.uk> writes:
> 
> > Having stored the IIR for action, we should always clear it.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> 
> As getting stray unexpected intrs usually is
> driver vs hw misconfiguration, should we at some point
> start to complain if we see one?

We have a history of doing strange things, sometimes even intentionally
;)

Maybe worth the effort in presilicon, but for the most part we are
trying desperately to minimise cost here.
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 90628a47ae17..e37e3ec22a79 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1534,11 +1534,8 @@  static void gen8_gt_irq_ack(struct drm_i915_private *i915,
 
 	if (master_ctl & (GEN8_GT_PM_IRQ | GEN8_GT_GUC_IRQ)) {
 		gt_iir[2] = raw_reg_read(regs, GEN8_GT_IIR(2));
-		if (likely(gt_iir[2] & (i915->pm_rps_events |
-					i915->pm_guc_events)))
-			raw_reg_write(regs, GEN8_GT_IIR(2),
-				      gt_iir[2] & (i915->pm_rps_events |
-						   i915->pm_guc_events));
+		if (likely(gt_iir[2]))
+			raw_reg_write(regs, GEN8_GT_IIR(2), gt_iir[2]);
 	}
 
 	if (master_ctl & GEN8_GT_VECS_IRQ) {