diff mbox series

[i-g-t] amdgpu: Exporting a dmabuf from amdgpu waits for outstanding fences

Message ID 20180806140817.2501-1-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show
Series [i-g-t] amdgpu: Exporting a dmabuf from amdgpu waits for outstanding fences | expand

Commit Message

Chris Wilson Aug. 6, 2018, 2:08 p.m. UTC
Since amdgpu is synchronous for exporting a dmabuf, exercise both paths
to highlight the issue.

v2: More action required to trigger the dmabuf-mapping

References: https://bugs.freedesktop.org/show_bug.cgi?id=107341
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/amdgpu/amd_prime.c | 47 +++++++++++++++++++++++++++++++---------
 1 file changed, 37 insertions(+), 10 deletions(-)

Comments

Chris Wilson Aug. 7, 2018, 7:35 a.m. UTC | #1
Quoting Chris Wilson (2018-08-06 15:08:17)
> Since amdgpu is synchronous for exporting a dmabuf, exercise both paths
> to highlight the issue.
> 
> v2: More action required to trigger the dmabuf-mapping
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=107341
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Poke

> ---
>  tests/amdgpu/amd_prime.c | 47 +++++++++++++++++++++++++++++++---------
>  1 file changed, 37 insertions(+), 10 deletions(-)
> 
> diff --git a/tests/amdgpu/amd_prime.c b/tests/amdgpu/amd_prime.c
> index 9bf298a41..4cd981114 100644
> --- a/tests/amdgpu/amd_prime.c
> +++ b/tests/amdgpu/amd_prime.c
> @@ -286,7 +286,9 @@ static void i915_to_amd(int i915, int amd, amdgpu_device_handle device)
>         gem_close(i915, obj[1].handle);
>  }
>  
> -static void amd_to_i915(int i915, int amd, amdgpu_device_handle device)
> +static void amd_to_i915(int i915, int amd, amdgpu_device_handle device,
> +                       unsigned int flags)
> +#define EXPORT_BEFORE 0x1
>  {
>         const uint32_t bbe = MI_BATCH_BUFFER_END;
>         struct drm_i915_gem_exec_object2 obj[2];
> @@ -300,11 +302,11 @@ static void amd_to_i915(int i915, int amd, amdgpu_device_handle device)
>         struct amdgpu_cs_ib_info ib_info;
>         uint32_t *ptr;
>         amdgpu_context_handle *contexts;
> -       int i, r, dmabuf;
>         amdgpu_bo_list_handle bo_list;
>         amdgpu_va_handle va_handle;
>         unsigned long count, size;
>         struct cork c;
> +       int i, r;
>  
>         memset(obj, 0, sizeof(obj));
>         obj[1].handle = gem_create(i915, 4096);
> @@ -320,6 +322,21 @@ static void amd_to_i915(int i915, int amd, amdgpu_device_handle device)
>                                     &ib_result_mc_address, &va_handle);
>         igt_assert_eq(r, 0);
>  
> +       if (flags & EXPORT_BEFORE) {
> +               int dmabuf;
> +
> +               amdgpu_bo_export(ib_result_handle,
> +                                amdgpu_bo_handle_type_dma_buf_fd,
> +                                (uint32_t *)&dmabuf);
> +               igt_assert(dmabuf != -1);
> +
> +               obj[0].handle = prime_fd_to_handle(i915, dmabuf);
> +               obj[0].flags = EXEC_OBJECT_WRITE;
> +               close(dmabuf);
> +
> +               gem_set_domain(i915, obj[0].handle, I915_GEM_DOMAIN_GTT, 0);
> +       }
> +
>         ptr = ib_result_cpu;
>         for (i = 0; i < 16; ++i)
>                 ptr[i] = GFX_COMPUTE_NOP;
> @@ -365,13 +382,20 @@ static void amd_to_i915(int i915, int amd, amdgpu_device_handle device)
>  
>         igt_info("Reservation width = %ld\n", count);
>  
> -       amdgpu_bo_export(ib_result_handle,
> -                        amdgpu_bo_handle_type_dma_buf_fd,
> -                        (uint32_t *)&dmabuf);
> -       igt_assert_eq(poll(&(struct pollfd){dmabuf, POLLOUT}, 1, 0), 0);
> -       obj[0].handle = prime_fd_to_handle(i915, dmabuf);
> -       obj[0].flags = EXEC_OBJECT_WRITE;
> -       close(dmabuf);
> +       if (!obj[0].handle) {
> +               int dmabuf;
> +
> +               amdgpu_bo_export(ib_result_handle,
> +                                amdgpu_bo_handle_type_dma_buf_fd,
> +                                (uint32_t *)&dmabuf);
> +               igt_assert(dmabuf != -1);
> +
> +               obj[0].handle = prime_fd_to_handle(i915, dmabuf);
> +               obj[0].flags = EXEC_OBJECT_WRITE;
> +
> +               igt_assert_eq(poll(&(struct pollfd){dmabuf, POLLOUT}, 1, 0), 0);
> +               close(dmabuf);
> +       }
>  
>         gem_execbuf(i915, &execbuf);
>         igt_assert(gem_bo_busy(i915, obj[1].handle));
> @@ -418,7 +442,10 @@ igt_main
>         }
>  
>         igt_subtest("amd-to-i915")
> -               amd_to_i915(i915, amd, device);
> +               amd_to_i915(i915, amd, device, EXPORT_BEFORE);
> +
> +       igt_subtest("inflight-amd-to-i915")
> +               amd_to_i915(i915, amd, device, 0);
>  
>         igt_fixture {
>                 amdgpu_device_deinitialize(device);
> -- 
> 2.18.0
>
diff mbox series

Patch

diff --git a/tests/amdgpu/amd_prime.c b/tests/amdgpu/amd_prime.c
index 9bf298a41..4cd981114 100644
--- a/tests/amdgpu/amd_prime.c
+++ b/tests/amdgpu/amd_prime.c
@@ -286,7 +286,9 @@  static void i915_to_amd(int i915, int amd, amdgpu_device_handle device)
 	gem_close(i915, obj[1].handle);
 }
 
-static void amd_to_i915(int i915, int amd, amdgpu_device_handle device)
+static void amd_to_i915(int i915, int amd, amdgpu_device_handle device,
+			unsigned int flags)
+#define EXPORT_BEFORE 0x1
 {
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	struct drm_i915_gem_exec_object2 obj[2];
@@ -300,11 +302,11 @@  static void amd_to_i915(int i915, int amd, amdgpu_device_handle device)
 	struct amdgpu_cs_ib_info ib_info;
 	uint32_t *ptr;
 	amdgpu_context_handle *contexts;
-	int i, r, dmabuf;
 	amdgpu_bo_list_handle bo_list;
 	amdgpu_va_handle va_handle;
 	unsigned long count, size;
 	struct cork c;
+	int i, r;
 
 	memset(obj, 0, sizeof(obj));
 	obj[1].handle = gem_create(i915, 4096);
@@ -320,6 +322,21 @@  static void amd_to_i915(int i915, int amd, amdgpu_device_handle device)
 				    &ib_result_mc_address, &va_handle);
 	igt_assert_eq(r, 0);
 
+	if (flags & EXPORT_BEFORE) {
+		int dmabuf;
+
+		amdgpu_bo_export(ib_result_handle,
+				 amdgpu_bo_handle_type_dma_buf_fd,
+				 (uint32_t *)&dmabuf);
+		igt_assert(dmabuf != -1);
+
+		obj[0].handle = prime_fd_to_handle(i915, dmabuf);
+		obj[0].flags = EXEC_OBJECT_WRITE;
+		close(dmabuf);
+
+		gem_set_domain(i915, obj[0].handle, I915_GEM_DOMAIN_GTT, 0);
+	}
+
 	ptr = ib_result_cpu;
 	for (i = 0; i < 16; ++i)
 		ptr[i] = GFX_COMPUTE_NOP;
@@ -365,13 +382,20 @@  static void amd_to_i915(int i915, int amd, amdgpu_device_handle device)
 
 	igt_info("Reservation width = %ld\n", count);
 
-	amdgpu_bo_export(ib_result_handle,
-			 amdgpu_bo_handle_type_dma_buf_fd,
-			 (uint32_t *)&dmabuf);
-	igt_assert_eq(poll(&(struct pollfd){dmabuf, POLLOUT}, 1, 0), 0);
-	obj[0].handle = prime_fd_to_handle(i915, dmabuf);
-	obj[0].flags = EXEC_OBJECT_WRITE;
-	close(dmabuf);
+	if (!obj[0].handle) {
+		int dmabuf;
+
+		amdgpu_bo_export(ib_result_handle,
+				 amdgpu_bo_handle_type_dma_buf_fd,
+				 (uint32_t *)&dmabuf);
+		igt_assert(dmabuf != -1);
+
+		obj[0].handle = prime_fd_to_handle(i915, dmabuf);
+		obj[0].flags = EXEC_OBJECT_WRITE;
+
+		igt_assert_eq(poll(&(struct pollfd){dmabuf, POLLOUT}, 1, 0), 0);
+		close(dmabuf);
+	}
 
 	gem_execbuf(i915, &execbuf);
 	igt_assert(gem_bo_busy(i915, obj[1].handle));
@@ -418,7 +442,10 @@  igt_main
 	}
 
 	igt_subtest("amd-to-i915")
-		amd_to_i915(i915, amd, device);
+		amd_to_i915(i915, amd, device, EXPORT_BEFORE);
+
+	igt_subtest("inflight-amd-to-i915")
+		amd_to_i915(i915, amd, device, 0);
 
 	igt_fixture {
 		amdgpu_device_deinitialize(device);