From patchwork Thu Aug 9 00:16:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10560657 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EEFFA1057 for ; Thu, 9 Aug 2018 00:17:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E250E20952 for ; Thu, 9 Aug 2018 00:17:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D674C2AC6C; Thu, 9 Aug 2018 00:17:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8FC1E20952 for ; Thu, 9 Aug 2018 00:17:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C36AC6E63E; Thu, 9 Aug 2018 00:17:07 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id CBD4A6E62E for ; Thu, 9 Aug 2018 00:16:54 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 17:16:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,212,1531810800"; d="scan'208";a="60976914" Received: from josouza-mobl.jf.intel.com ([10.24.11.40]) by fmsmga007.fm.intel.com with ESMTP; 08 Aug 2018 17:16:54 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:16:02 -0700 Message-Id: <20180809001606.26876-16-jose.souza@intel.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180809001606.26876-1-jose.souza@intel.com> References: <20180809001606.26876-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 16/20] drm/i915: Do not initialize display clocks when display is disabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP cdclk and rawclk are the 2 display clocks that can now be completed not initialized when display is disabled. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_drv.c | 9 ++++++--- drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++ 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 7e948bf30cdd..743b03d50abb 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -918,7 +918,8 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv, goto err_uc; intel_irq_init(dev_priv); intel_hangcheck_init(dev_priv); - intel_init_display_hooks(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_init_display_hooks(dev_priv); intel_init_clock_gating_hooks(dev_priv); if (INTEL_INFO(dev_priv)->num_pipes) { intel_init_audio_hooks(dev_priv); @@ -1390,7 +1391,8 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent) goto out_cleanup_mmio; /* must happen before intel_power_domains_init_hw() on VLV/CHV */ - intel_update_rawclk(dev_priv); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_update_rawclk(dev_priv); /* i915_gem_init() call chain will call * intel_display_power_put(i915, POWER_DOMAIN_GT_IRQ); @@ -1800,7 +1802,8 @@ static int i915_drm_resume(struct drm_device *dev) i915_gem_resume(dev_priv); - intel_modeset_init_hw(dev); + if (INTEL_INFO(dev_priv)->num_pipes) + intel_modeset_init_hw(dev); intel_init_clock_gating(dev_priv); spin_lock_irq(&dev_priv->irq_lock); diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 43d7f9071ff4..01e0c8e82fcf 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -807,6 +807,9 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv, gen9_set_dc_state(dev_priv, DC_STATE_DISABLE); + if (!INTEL_INFO(dev_priv)->num_pipes) + return; + dev_priv->display.get_cdclk(dev_priv, &cdclk_state); /* Can't read out voltage_level so can't use intel_cdclk_changed() */ WARN_ON(intel_cdclk_needs_modeset(&dev_priv->cdclk.hw, &cdclk_state));