From patchwork Tue Aug 14 15:05:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 10565823 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 783AA139A for ; Tue, 14 Aug 2018 15:05:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 69B432A05E for ; Tue, 14 Aug 2018 15:05:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5E4E42A0E6; Tue, 14 Aug 2018 15:05:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0C4722A05E for ; Tue, 14 Aug 2018 15:05:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4AAE26E286; Tue, 14 Aug 2018 15:05:41 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mail-wm0-x243.google.com (mail-wm0-x243.google.com [IPv6:2a00:1450:400c:c09::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3DD416E290 for ; Tue, 14 Aug 2018 15:05:35 +0000 (UTC) Received: by mail-wm0-x243.google.com with SMTP id c14-v6so12622470wmb.4 for ; Tue, 14 Aug 2018 08:05:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RRZjVA47k70BUzwT+og7Nq9jOxLrdD/F1jSfsVJykxA=; b=PLuT/ydPFPzLoMxtLX8hyucqrhQmEeKJK1HOvNh3kQex1vWG462rWSnGQQHTbMNFEW y+WkIDsNCWU7oiuLEe72pKuu1G3mOQnDZk6OdAJFc3pO7aYrQ2Q5ohcXzsFriWHil/ZA xKVZrhiXAxGwHzqYFkEsIGS37HQ+JRsngxlOYN32KM66N2gthuaHuxAuZ/1Zqed2gOU9 pk3i3l/8mdY1T5v7LpvTevXpoX39Q5VLUbUe1YLp15QNl9HohIg3WGDp0zBPuuh7Mv8P l8gTi+TChqufH8yW00TTHj4+xB1PO8sHz65T9F7UBUmuFOBW5myAn1ac2l0ftVjFW1Jc RuVQ== X-Gm-Message-State: AOUpUlHjCrjcMkRT3osoIBSSpuhRFHbB43DM/Zn0cIjRx58nWAylf0vS HKNXA0hriy1cKNOWPqgfw1jwqQ== X-Google-Smtp-Source: AA+uWPz7f+90fvsBO3vXtoeAXaRWU+AYBescDPnDyspg2QpFrCh3IkNt2J5i+CJ/j24L3NKKUh+RfA== X-Received: by 2002:a1c:dacb:: with SMTP id r194-v6mr10880697wmg.56.1534259133874; Tue, 14 Aug 2018 08:05:33 -0700 (PDT) Received: from localhost.localdomain ([95.144.165.93]) by smtp.gmail.com with ESMTPSA id x82-v6sm39942383wmd.11.2018.08.14.08.05.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 14 Aug 2018 08:05:32 -0700 (PDT) From: Tvrtko Ursulin X-Google-Original-From: Tvrtko Ursulin To: igt-dev@lists.freedesktop.org Date: Tue, 14 Aug 2018 16:05:17 +0100 Message-Id: <20180814150519.20204-6-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180814150519.20204-1-tvrtko.ursulin@linux.intel.com> References: <20180814150519.20204-1-tvrtko.ursulin@linux.intel.com> Subject: [Intel-gfx] [PATCH i-g-t 5/7] gem_wsim: Make batches preemptable by default X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-gfx@lists.freedesktop.org MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin MI_NOOP cannot be preempted which means up to now gem_wsim workloads were preemptable on batch buffer granularity only. Add MI_ARB_CHK every 100us so the new default is mid-batch preemption. Signed-off-by: Tvrtko Ursulin --- benchmarks/gem_wsim.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c index 24f518a7770f..f60c086a3f1e 100644 --- a/benchmarks/gem_wsim.c +++ b/benchmarks/gem_wsim.c @@ -683,6 +683,25 @@ static unsigned long get_bb_sz(unsigned int duration) nop_calibration_us, sizeof(uint32_t)); } +static void +init_bb(struct w_step *w, unsigned int flags) +{ + /* Preemption point every 100us. */ + const unsigned int arb_period = get_bb_sz(100) / sizeof(uint32_t); + unsigned int i; + uint32_t *ptr; + + gem_set_domain(fd, w->bb_handle, + I915_GEM_DOMAIN_WC, I915_GEM_DOMAIN_WC); + + ptr = gem_mmap__wc(fd, w->bb_handle, 0, w->bb_sz, PROT_WRITE); + + for (i = arb_period; i < w->bb_sz / sizeof(uint32_t); i += arb_period) + ptr[i] = 0x5 << 23; /* MI_ARB_CHK */ + + munmap(ptr, w->bb_sz); +} + static void terminate_bb(struct w_step *w, unsigned int flags) { @@ -836,6 +855,7 @@ alloc_step_batch(struct workload *wrk, struct w_step *w, unsigned int flags) w->bb_sz = get_bb_sz(w->duration.max); w->bb_handle = w->obj[j].handle = gem_create(fd, w->bb_sz); + init_bb(w, flags); terminate_bb(w, flags); if (flags & SEQNO) {