From patchwork Wed Aug 29 19:10:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wajdeczko X-Patchwork-Id: 10580763 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6B273174A for ; Wed, 29 Aug 2018 19:11:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5C16C2BB02 for ; Wed, 29 Aug 2018 19:11:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 501932BB05; Wed, 29 Aug 2018 19:11:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E0A612BB02 for ; Wed, 29 Aug 2018 19:11:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 48C7C6E597; Wed, 29 Aug 2018 19:11:21 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id AEA2D6E597 for ; Wed, 29 Aug 2018 19:11:19 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Aug 2018 12:11:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,304,1531810800"; d="scan'208";a="85562372" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by fmsmga001.fm.intel.com with ESMTP; 29 Aug 2018 12:11:17 -0700 Received: from mwajdecz-MOBL1.ger.corp.intel.com (mwajdecz-mobl1.ger.corp.intel.com [172.28.181.6]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id w7TJB9RJ021381; Wed, 29 Aug 2018 20:11:17 +0100 From: Michal Wajdeczko To: intel-gfx@lists.freedesktop.org Date: Wed, 29 Aug 2018 19:10:37 +0000 Message-Id: <20180829191056.63760-4-michal.wajdeczko@intel.com> X-Mailer: git-send-email 2.10.1.windows.1 In-Reply-To: <20180829191056.63760-1-michal.wajdeczko@intel.com> References: <20180829191056.63760-1-michal.wajdeczko@intel.com> Subject: [Intel-gfx] [PATCH 03/21] drm/i915/guc: Simplify preparation of GuC parameter block X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Definition of the parameters block passed to GuC is about to change. Slightly refactor code now to make upcoming patch smaller. Signed-off-by: Michal Wajdeczko Cc: Joonas Lahtinen Cc: John Spotswood Reviewed-by: John Spotswood Reviewed-by: Joonas Lahtinen --- drivers/gpu/drm/i915/intel_guc.c | 38 +++++++++++++++++++++++--------------- 1 file changed, 23 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index 230aea6..982bcc8 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -320,19 +320,8 @@ static u32 guc_ctl_log_params_flags(struct intel_guc *guc) return flags; } -/* - * Initialise the GuC parameter block before starting the firmware - * transfer. These parameters are read by the firmware on startup - * and cannot be changed thereafter. - */ -void intel_guc_init_params(struct intel_guc *guc) +static void guc_prepare_params(struct intel_guc *guc, u32 *params) { - struct drm_i915_private *dev_priv = guc_to_i915(guc); - u32 params[GUC_CTL_MAX_DWORDS]; - int i; - - memset(params, 0, sizeof(params)); - /* * GuC ARAT increment is 10 ns. GuC default scheduler quantum is one * second. This ARAR is calculated by: @@ -347,9 +336,12 @@ void intel_guc_init_params(struct intel_guc *guc) params[GUC_CTL_LOG_PARAMS] = guc_ctl_log_params_flags(guc); params[GUC_CTL_DEBUG] = guc_ctl_debug_flags(guc); params[GUC_CTL_CTXINFO] = guc_ctl_ctxinfo_flags(guc); +} - for (i = 0; i < GUC_CTL_MAX_DWORDS; i++) - DRM_DEBUG_DRIVER("param[%2d] = %#x\n", i, params[i]); +static void guc_write_params(struct intel_guc *guc, const u32 *params) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + int i; /* * All SOFT_SCRATCH registers are in FORCEWAKE_BLITTER domain and @@ -360,12 +352,28 @@ void intel_guc_init_params(struct intel_guc *guc) I915_WRITE(SOFT_SCRATCH(0), 0); - for (i = 0; i < GUC_CTL_MAX_DWORDS; i++) + for (i = 0; i < GUC_CTL_MAX_DWORDS; i++) { + DRM_DEBUG_DRIVER("param[%2d] = %#x\n", i, params[i]); I915_WRITE(SOFT_SCRATCH(1 + i), params[i]); + } intel_uncore_forcewake_put(dev_priv, FORCEWAKE_BLITTER); } +/* + * Initialise the GuC parameter block before starting the firmware + * transfer. These parameters are read by the firmware on startup + * and cannot be changed thereafter. + */ +void intel_guc_init_params(struct intel_guc *guc) +{ + u32 params[GUC_CTL_MAX_DWORDS]; + + memset(params, 0, sizeof(params)); + guc_prepare_params(guc, params); + guc_write_params(guc, params); +} + int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len, u32 *response_buf, u32 response_buf_size) {