From patchwork Wed Aug 29 19:18:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wajdeczko X-Patchwork-Id: 10580793 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0D23F14E1 for ; Wed, 29 Aug 2018 19:18:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F00412B93B for ; Wed, 29 Aug 2018 19:18:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E08F92B96C; Wed, 29 Aug 2018 19:18:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CC2552B93B for ; Wed, 29 Aug 2018 19:18:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 29BC46E5C5; Wed, 29 Aug 2018 19:18:29 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id D69EA6E5C5 for ; Wed, 29 Aug 2018 19:18:27 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Aug 2018 12:18:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,304,1531810800"; d="scan'208";a="259134446" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by fmsmga006.fm.intel.com with ESMTP; 29 Aug 2018 12:18:25 -0700 Received: from mwajdecz-MOBL1.ger.corp.intel.com (mwajdecz-mobl1.ger.corp.intel.com [172.28.181.6]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id w7TJIOJW022844; Wed, 29 Aug 2018 20:18:24 +0100 From: Michal Wajdeczko To: intel-gfx@lists.freedesktop.org Date: Wed, 29 Aug 2018 19:18:05 +0000 Message-Id: <20180829191814.10872-1-michal.wajdeczko@intel.com> X-Mailer: git-send-email 2.10.1.windows.1 In-Reply-To: <20180829191056.63760-1-michal.wajdeczko@intel.com> References: <20180829191056.63760-1-michal.wajdeczko@intel.com> Subject: [Intel-gfx] [PATCH 10/21] drm/i915: Add hooks for (per-engine) context allocation/update/free X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP In upcoming GuC patch we will require notification per engine context allocation/update/free to correctly setup GuC stage descriptors. Signed-off-by: Michal Wajdeczko Cc: Michel Thierry Cc: Daniele Ceraolo Spurio Cc: Joonas Lahtinen Cc: Tomasz Lis Cc: Michal Winiarski --- drivers/gpu/drm/i915/i915_drv.h | 11 +++++++++++ drivers/gpu/drm/i915/i915_gem_context.c | 6 +++++- drivers/gpu/drm/i915/intel_lrc.c | 7 +++++++ 3 files changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 34f5495..234c819 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1881,6 +1881,17 @@ struct drm_i915_private { #define MAX_GUC_CONTEXT_HW_ID (1 << 20) /* exclusive */ #define GEN11_MAX_CONTEXT_HW_ID (1 << 11) /* exclusive */ #define GEN11_MAX_CONTEXT_HW_ID_WITH_GUC (GEN11_MAX_CONTEXT_HW_ID - 16) + + /* + * Hooks for context (per-engine context, not gem context) + * allocation, deallocation and descriptor update. + */ + void (*alloc_hook)(struct i915_gem_context *ctx, + struct intel_engine_cs *engine); + void (*update_hook)(struct i915_gem_context *ctx, + struct intel_engine_cs *engine); + void (*free_hook)(struct i915_gem_context *ctx, + struct intel_engine_cs *engine); } contexts; u32 fdi_rx_config; diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index e3b500c..976941e 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -126,9 +126,13 @@ static void i915_gem_context_free(struct i915_gem_context *ctx) for (n = 0; n < ARRAY_SIZE(ctx->__engine); n++) { struct intel_context *ce = &ctx->__engine[n]; + struct intel_engine_cs *engine = ctx->i915->engine[n]; - if (ce->ops) + if (ce->ops) { + if (ctx->i915->contexts.free_hook) + ctx->i915->contexts.free_hook(ctx, engine); ce->ops->destroy(ce); + } } kfree(ctx->name); diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 3001a14..ef4d491 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -266,6 +266,9 @@ static inline bool need_preempt(const struct intel_engine_cs *engine, } ce->lrc_desc = desc; + + if (ctx->i915->contexts.update_hook) + ctx->i915->contexts.update_hook(ctx, engine); } static struct i915_priolist * @@ -2722,6 +2725,7 @@ static int execlists_context_deferred_alloc(struct i915_gem_context *ctx, struct intel_engine_cs *engine, struct intel_context *ce) { + struct drm_i915_private *i915 = engine->i915; struct drm_i915_gem_object *ctx_obj; struct i915_vma *vma; uint32_t context_size; @@ -2777,6 +2781,9 @@ static int execlists_context_deferred_alloc(struct i915_gem_context *ctx, ce->sw_counter = engine->instance; } + if (i915->contexts.alloc_hook) + i915->contexts.alloc_hook(ctx, engine); + return 0; error_ring_free: