| Message ID | 20180903150216.19965-1-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Fix up FORCE_GPU_RELOC (debug) to flush CPU write domains | expand |
On Mon, 3 Sep 2018 at 16:04, Chris Wilson <chris@chris-wilson.co.uk> wrote: > > We currently assert that if the target is in a CPU write domain, we use > a CPU path rather than the GPU path. However, we have a debug override > to force the GPU path and that unfortunately hits the assert. Include > the async clflush under the debug option. > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com>
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 43706c1db31a..7d0b3a2c30e2 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -1127,6 +1127,13 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb, u32 *cmd; int err; + if (DBG_FORCE_RELOC == FORCE_GPU_RELOC) { + obj = vma->obj; + if (obj->cache_dirty & ~obj->cache_coherent) + i915_gem_clflush_object(obj, 0); + obj->write_domain = 0; + } + GEM_BUG_ON(vma->obj->write_domain & I915_GEM_DOMAIN_CPU); obj = i915_gem_batch_pool_get(&eb->engine->batch_pool, PAGE_SIZE);
We currently assert that if the target is in a CPU write domain, we use a CPU path rather than the GPU path. However, we have a debug override to force the GPU path and that unfortunately hits the assert. Include the async clflush under the debug option. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 7 +++++++ 1 file changed, 7 insertions(+)