From patchwork Fri Sep 7 15:24:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 10592305 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8A910921 for ; Fri, 7 Sep 2018 15:25:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 791B32861E for ; Fri, 7 Sep 2018 15:25:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6D647286AC; Fri, 7 Sep 2018 15:25:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E8FCE2861E for ; Fri, 7 Sep 2018 15:25:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 167136E95A; Fri, 7 Sep 2018 15:25:08 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id CAEB06E955 for ; Fri, 7 Sep 2018 15:25:06 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Sep 2018 08:25:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,342,1531810800"; d="scan'208";a="83951378" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by fmsmga002.fm.intel.com with SMTP; 07 Sep 2018 08:24:43 -0700 Received: by stinkbox (sSMTP sendmail emulation); Fri, 07 Sep 2018 18:24:43 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Fri, 7 Sep 2018 18:24:10 +0300 Message-Id: <20180907152413.15761-11-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20180907152413.15761-1-ville.syrjala@linux.intel.com> References: <20180907152413.15761-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 10/13] drm/i915: Move skl plane fb related checks into a better place X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä Move the skl+ specific framebuffer related checks from intel_plane_atomic_check_with_state() into a new function (skl_plane_check_fb()) which we'll simply call from the skl plane->check() hook. v2: Split out the Y/Yf+CCS vs. interlaced change (José) Reviewed-by: José Roberto de Souza Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_atomic_plane.c | 44 --------------------- drivers/gpu/drm/i915/intel_display.c | 12 ------ drivers/gpu/drm/i915/intel_sprite.c | 66 +++++++++++++++++++++++++++++++ 3 files changed, 66 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c index fa7df5fe154b..7c0873060934 100644 --- a/drivers/gpu/drm/i915/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c @@ -116,40 +116,11 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ struct drm_i915_private *dev_priv = to_i915(plane->dev); struct drm_plane_state *state = &intel_state->base; struct intel_plane *intel_plane = to_intel_plane(plane); - const struct drm_display_mode *adjusted_mode = - &crtc_state->base.adjusted_mode; int ret; if (!intel_state->base.crtc && !old_plane_state->base.crtc) return 0; - if (state->fb && drm_rotation_90_or_270(state->rotation)) { - struct drm_format_name_buf format_name; - - if (state->fb->modifier != I915_FORMAT_MOD_Y_TILED && - state->fb->modifier != I915_FORMAT_MOD_Yf_TILED) { - DRM_DEBUG_KMS("Y/Yf tiling required for 90/270!\n"); - return -EINVAL; - } - - /* - * 90/270 is not allowed with RGB64 16:16:16:16, - * RGB 16-bit 5:6:5, and Indexed 8-bit. - * TBD: Add RGB64 case once its added in supported format list. - */ - switch (state->fb->format->format) { - case DRM_FORMAT_C8: - case DRM_FORMAT_RGB565: - DRM_DEBUG_KMS("Unsupported pixel format %s for 90/270!\n", - drm_get_format_name(state->fb->format->format, - &format_name)); - return -EINVAL; - - default: - break; - } - } - /* CHV ignores the mirror bit when the rotate bit is set :( */ if (IS_CHERRYVIEW(dev_priv) && state->rotation & DRM_MODE_ROTATE_180 && @@ -163,21 +134,6 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ if (ret) return ret; - /* - * Y-tiling is not supported in IF-ID Interlace mode in - * GEN9 and above. - */ - if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable && - adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) { - if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED || - state->fb->modifier == I915_FORMAT_MOD_Yf_TILED || - state->fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS || - state->fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS) { - DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n"); - return -EINVAL; - } - } - /* FIXME pre-g4x don't work like this */ if (state->visible) crtc_state->active_planes |= BIT(intel_plane->id); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index adbb8e6d8d39..a8072c78c170 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3155,12 +3155,6 @@ static int skl_check_ccs_aux_surface(struct intel_plane_state *plane_state) int y = src_y / vsub; u32 offset; - if (plane_state->base.rotation & ~(DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180)) { - DRM_DEBUG_KMS("RC support only with 0/180 degree rotation %x\n", - plane_state->base.rotation); - return -EINVAL; - } - intel_add_fb_offsets(&x, &y, plane_state, 1); offset = intel_plane_compute_aligned_offset(&x, &y, plane_state, 1); @@ -3182,12 +3176,6 @@ int skl_check_plane_surface(const struct intel_crtc_state *crtc_state, plane_state->color_plane[0].stride = intel_fb_pitch(fb, 0, rotation); plane_state->color_plane[1].stride = intel_fb_pitch(fb, 1, rotation); - if (rotation & DRM_MODE_REFLECT_X && - fb->modifier == DRM_FORMAT_MOD_LINEAR) { - DRM_DEBUG_KMS("horizontal flip is not supported with linear surface formats\n"); - return -EINVAL; - } - if (!plane_state->base.visible) return 0; diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 505d85291ee6..5fd425ac1b3b 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1158,6 +1158,68 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state, return 0; } +static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, + const struct intel_plane_state *plane_state) +{ + const struct drm_framebuffer *fb = plane_state->base.fb; + unsigned int rotation = plane_state->base.rotation; + struct drm_format_name_buf format_name; + + if (!fb) + return 0; + + if (rotation & ~(DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180) && + (fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS && + fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS)) { + DRM_DEBUG_KMS("RC support only with 0/180 degree rotation (%x)\n", + rotation); + return -EINVAL; + } + + if (rotation & DRM_MODE_REFLECT_X && + fb->modifier == DRM_FORMAT_MOD_LINEAR) { + DRM_DEBUG_KMS("horizontal flip is not supported with linear surface formats\n"); + return -EINVAL; + } + + if (drm_rotation_90_or_270(rotation)) { + if (fb->modifier != I915_FORMAT_MOD_Y_TILED && + fb->modifier != I915_FORMAT_MOD_Yf_TILED) { + DRM_DEBUG_KMS("Y/Yf tiling required for 90/270!\n"); + return -EINVAL; + } + + /* + * 90/270 is not allowed with RGB64 16:16:16:16, + * RGB 16-bit 5:6:5, and Indexed 8-bit. + * TBD: Add RGB64 case once its added in supported format list. + */ + switch (fb->format->format) { + case DRM_FORMAT_C8: + case DRM_FORMAT_RGB565: + DRM_DEBUG_KMS("Unsupported pixel format %s for 90/270!\n", + drm_get_format_name(fb->format->format, + &format_name)); + return -EINVAL; + default: + break; + } + } + + /* Y-tiling is not supported in IF-ID Interlace mode */ + if (crtc_state->base.enable && + crtc_state->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE && + (fb->modifier == I915_FORMAT_MOD_Y_TILED || + fb->modifier == I915_FORMAT_MOD_Yf_TILED || + fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS || + fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS)) { + DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n"); + return -EINVAL; + } + + return 0; +} + int skl_plane_check(struct intel_crtc_state *crtc_state, struct intel_plane_state *plane_state) { @@ -1166,6 +1228,10 @@ int skl_plane_check(struct intel_crtc_state *crtc_state, int max_scale, min_scale; int ret; + ret = skl_plane_check_fb(crtc_state, plane_state); + if (ret) + return ret; + /* use scaler when colorkey is not required */ if (!plane_state->ckey.flags) { const struct drm_framebuffer *fb = plane_state->base.fb;