| Message ID | 20180914001822.2503-1-dhinakaran.pandiyan@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/psr: Enable AUX-A IO power well on ICL for PSR | expand |
On Thu, Sep 13, 2018 at 05:18:22PM -0700, Dhinakaran Pandiyan wrote: > PSR requires AUX IO power well to be enabled. This was already in place > for CNL, extend this for ICL too. Not enabling the power well results in > the aux error interrupts when the hardware exits PSR. > > Reported-by: Casey G Bowman <casey.g.bowman@intel.com> > Reported-by: Jyoti R Yadav <jyoti.r.yadav@intel.com> > Cc: Matt Atwood <matthew.s.atwood@intel.com> > Cc: Jyoti R Yadav <jyoti.r.yadav@intel.com> > Cc: Casey G Bowman <casey.g.bowman@intel.com> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/i915/intel_ddi.c | 2 +- > drivers/gpu/drm/i915/intel_runtime_pm.c | 1 + > 2 files changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > index cd01a09c5e0f..b6910c8b4e08 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -2077,7 +2077,7 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder, > static inline enum intel_display_power_domain > intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp) > { > - /* CNL HW requires corresponding AUX IOs to be powered up for PSR with > + /* CNL+ HW requires corresponding AUX IOs to be powered up for PSR with > * DC states enabled at the same time, while for driver initiated AUX > * transfers we need the same AUX IOs to be powered but with DC states > * disabled. Accordingly use the AUX power domain here which leaves DC > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 9bebec389de1..0fdabce647ab 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -1996,6 +1996,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, > BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO)) > > #define ICL_AUX_A_IO_POWER_DOMAINS ( \ > + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ > BIT_ULL(POWER_DOMAIN_AUX_A)) > #define ICL_AUX_B_IO_POWER_DOMAINS ( \ > BIT_ULL(POWER_DOMAIN_AUX_B)) > -- > 2.17.1 >
Tested-by: Casey Bowman <casey.g.bowman@intel.com> -----Original Message----- From: Pandiyan, Dhinakaran Sent: Thursday, September 13, 2018 5:18 PM To: intel-gfx@lists.freedesktop.org Cc: Souza, Jose <jose.souza@intel.com>; Deak, Imre <imre.deak@intel.com>; Pandiyan, Dhinakaran <dhinakaran.pandiyan@intel.com>; Atwood, Matthew S <matthew.s.atwood@intel.com>; Yadav, Jyoti R <jyoti.r.yadav@intel.com>; Bowman, Casey G <casey.g.bowman@intel.com> Subject: [PATCH] drm/i915/psr: Enable AUX-A IO power well on ICL for PSR PSR requires AUX IO power well to be enabled. This was already in place for CNL, extend this for ICL too. Not enabling the power well results in the aux error interrupts when the hardware exits PSR. Reported-by: Casey G Bowman <casey.g.bowman@intel.com> Reported-by: Jyoti R Yadav <jyoti.r.yadav@intel.com> Cc: Matt Atwood <matthew.s.atwood@intel.com> Cc: Jyoti R Yadav <jyoti.r.yadav@intel.com> Cc: Casey G Bowman <casey.g.bowman@intel.com> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> --- drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers/gpu/drm/i915/intel_runtime_pm.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index cd01a09c5e0f..b6910c8b4e08 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2077,7 +2077,7 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder, static inline enum intel_display_power_domain intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp) { - /* CNL HW requires corresponding AUX IOs to be powered up for PSR with + /* CNL+ HW requires corresponding AUX IOs to be powered up for PSR +with * DC states enabled at the same time, while for driver initiated AUX * transfers we need the same AUX IOs to be powered but with DC states * disabled. Accordingly use the AUX power domain here which leaves DC diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 9bebec389de1..0fdabce647ab 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -1996,6 +1996,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO)) #define ICL_AUX_A_IO_POWER_DOMAINS ( \ + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ BIT_ULL(POWER_DOMAIN_AUX_A)) #define ICL_AUX_B_IO_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_AUX_B)) -- 2.17.1
On Thu, 2018-09-13 at 17:18 -0700, Dhinakaran Pandiyan wrote: > PSR requires AUX IO power well to be enabled. This was already in > place > for CNL, extend this for ICL too. Not enabling the power well results > in > the aux error interrupts when the hardware exits PSR. > Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > Reported-by: Casey G Bowman <casey.g.bowman@intel.com> > Reported-by: Jyoti R Yadav <jyoti.r.yadav@intel.com> > Cc: Matt Atwood <matthew.s.atwood@intel.com> > Cc: Jyoti R Yadav <jyoti.r.yadav@intel.com> > Cc: Casey G Bowman <casey.g.bowman@intel.com> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> > --- > drivers/gpu/drm/i915/intel_ddi.c | 2 +- > drivers/gpu/drm/i915/intel_runtime_pm.c | 1 + > 2 files changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c > b/drivers/gpu/drm/i915/intel_ddi.c > index cd01a09c5e0f..b6910c8b4e08 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -2077,7 +2077,7 @@ bool intel_ddi_get_hw_state(struct > intel_encoder *encoder, > static inline enum intel_display_power_domain > intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp) > { > - /* CNL HW requires corresponding AUX IOs to be powered up for > PSR with > + /* CNL+ HW requires corresponding AUX IOs to be powered up for > PSR with > * DC states enabled at the same time, while for driver > initiated AUX > * transfers we need the same AUX IOs to be powered but with DC > states > * disabled. Accordingly use the AUX power domain here which > leaves DC > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 9bebec389de1..0fdabce647ab 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -1996,6 +1996,7 @@ void intel_display_power_put(struct > drm_i915_private *dev_priv, > BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO)) > > #define ICL_AUX_A_IO_POWER_DOMAINS ( \ > + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ > BIT_ULL(POWER_DOMAIN_AUX_A)) > #define ICL_AUX_B_IO_POWER_DOMAINS ( \ > BIT_ULL(POWER_DOMAIN_AUX_B))
Hi Dhinakaran, I tested this patch. Now I am not able to see those "AUX Error Interrupts". Thanks for your patch. Regards Jyoti -----Original Message----- From: Pandiyan, Dhinakaran Sent: Friday, September 14, 2018 5:48 AM To: intel-gfx@lists.freedesktop.org Cc: Souza, Jose <jose.souza@intel.com>; Deak, Imre <imre.deak@intel.com>; Pandiyan, Dhinakaran <dhinakaran.pandiyan@intel.com>; Atwood, Matthew S <matthew.s.atwood@intel.com>; Yadav, Jyoti R <jyoti.r.yadav@intel.com>; Bowman, Casey G <casey.g.bowman@intel.com> Subject: [PATCH] drm/i915/psr: Enable AUX-A IO power well on ICL for PSR PSR requires AUX IO power well to be enabled. This was already in place for CNL, extend this for ICL too. Not enabling the power well results in the aux error interrupts when the hardware exits PSR. Reported-by: Casey G Bowman <casey.g.bowman@intel.com> Reported-by: Jyoti R Yadav <jyoti.r.yadav@intel.com> Cc: Matt Atwood <matthew.s.atwood@intel.com> Cc: Jyoti R Yadav <jyoti.r.yadav@intel.com> Cc: Casey G Bowman <casey.g.bowman@intel.com> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> --- drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers/gpu/drm/i915/intel_runtime_pm.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index cd01a09c5e0f..b6910c8b4e08 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2077,7 +2077,7 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder, static inline enum intel_display_power_domain intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp) { - /* CNL HW requires corresponding AUX IOs to be powered up for PSR with + /* CNL+ HW requires corresponding AUX IOs to be powered up for PSR +with * DC states enabled at the same time, while for driver initiated AUX * transfers we need the same AUX IOs to be powered but with DC states * disabled. Accordingly use the AUX power domain here which leaves DC diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 9bebec389de1..0fdabce647ab 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -1996,6 +1996,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO)) #define ICL_AUX_A_IO_POWER_DOMAINS ( \ + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ BIT_ULL(POWER_DOMAIN_AUX_A)) #define ICL_AUX_B_IO_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_AUX_B)) -- 2.17.1
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index cd01a09c5e0f..b6910c8b4e08 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2077,7 +2077,7 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder, static inline enum intel_display_power_domain intel_ddi_main_link_aux_domain(struct intel_dp *intel_dp) { - /* CNL HW requires corresponding AUX IOs to be powered up for PSR with + /* CNL+ HW requires corresponding AUX IOs to be powered up for PSR with * DC states enabled at the same time, while for driver initiated AUX * transfers we need the same AUX IOs to be powered but with DC states * disabled. Accordingly use the AUX power domain here which leaves DC diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 9bebec389de1..0fdabce647ab 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -1996,6 +1996,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO)) #define ICL_AUX_A_IO_POWER_DOMAINS ( \ + BIT_ULL(POWER_DOMAIN_AUX_IO_A) | \ BIT_ULL(POWER_DOMAIN_AUX_A)) #define ICL_AUX_B_IO_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_AUX_B))
PSR requires AUX IO power well to be enabled. This was already in place for CNL, extend this for ICL too. Not enabling the power well results in the aux error interrupts when the hardware exits PSR. Reported-by: Casey G Bowman <casey.g.bowman@intel.com> Reported-by: Jyoti R Yadav <jyoti.r.yadav@intel.com> Cc: Matt Atwood <matthew.s.atwood@intel.com> Cc: Jyoti R Yadav <jyoti.r.yadav@intel.com> Cc: Casey G Bowman <casey.g.bowman@intel.com> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> --- drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers/gpu/drm/i915/intel_runtime_pm.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-)