| Message ID | 20180918181015.11001-4-jose.souza@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v3,1/6] drm/i915/runtime_pm: Share code to enable/disable PCH reset handshake | expand |
On Tue, Sep 18, 2018 at 11:10:13AM -0700, José Roberto de Souza wrote: > SKL has IPC but it should not be set according to the WA, so lets > just mark as it don't have it to simply the code and avoid > unnecessary MMIO writes at every call to intel_enable_ipc(). > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > drivers/gpu/drm/i915/i915_pci.c | 2 ++ > drivers/gpu/drm/i915/intel_pm.c | 4 ---- > 2 files changed, 2 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index d6f7b9fe1d26..adac75e5d5f7 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -472,6 +472,8 @@ static const struct intel_device_info intel_cherryview_info = { > > #define SKL_PLATFORM \ > GEN9_FEATURES, \ > + /* Display WA #0477 WaDisableIPC: skl */ \ > + .has_ipc = 0, \ > PLATFORM(INTEL_SKYLAKE) > > static const struct intel_device_info intel_skylake_gt1_info = { > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index e2ca04534e23..538bcde0bf7d 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -6120,10 +6120,6 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv) > if (!HAS_IPC(dev_priv)) > return; > > - /* Display WA #0477 WaDisableIPC: skl */ > - if (IS_SKYLAKE(dev_priv)) > - dev_priv->ipc_enabled = false; > - > /* Display WA #1141: SKL:all KBL:all CFL */ > if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv)) && > !dev_priv->dram_info.symmetric_memory) > -- > 2.19.0 >
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index d6f7b9fe1d26..adac75e5d5f7 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -472,6 +472,8 @@ static const struct intel_device_info intel_cherryview_info = { #define SKL_PLATFORM \ GEN9_FEATURES, \ + /* Display WA #0477 WaDisableIPC: skl */ \ + .has_ipc = 0, \ PLATFORM(INTEL_SKYLAKE) static const struct intel_device_info intel_skylake_gt1_info = { diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index e2ca04534e23..538bcde0bf7d 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -6120,10 +6120,6 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv) if (!HAS_IPC(dev_priv)) return; - /* Display WA #0477 WaDisableIPC: skl */ - if (IS_SKYLAKE(dev_priv)) - dev_priv->ipc_enabled = false; - /* Display WA #1141: SKL:all KBL:all CFL */ if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv)) && !dev_priv->dram_info.symmetric_memory)
SKL has IPC but it should not be set according to the WA, so lets just mark as it don't have it to simply the code and avoid unnecessary MMIO writes at every call to intel_enable_ipc(). Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 2 ++ drivers/gpu/drm/i915/intel_pm.c | 4 ---- 2 files changed, 2 insertions(+), 4 deletions(-)