From patchwork Thu Sep 20 14:33:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kuoppala X-Patchwork-Id: 10607847 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9952E1508 for ; Thu, 20 Sep 2018 14:34:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8976D2D9C4 for ; Thu, 20 Sep 2018 14:34:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7E0452D9E1; Thu, 20 Sep 2018 14:34:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2D6EE2D9C4 for ; Thu, 20 Sep 2018 14:34:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2012A6E617; Thu, 20 Sep 2018 14:34:25 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 212A76E60E for ; Thu, 20 Sep 2018 14:34:13 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Sep 2018 07:34:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,398,1531810800"; d="scan'208";a="71556572" Received: from rosetta.fi.intel.com ([10.237.72.186]) by fmsmga007.fm.intel.com with ESMTP; 20 Sep 2018 07:34:10 -0700 Received: by rosetta.fi.intel.com (Postfix, from userid 1000) id 13F0A840854; Thu, 20 Sep 2018 17:33:52 +0300 (EEST) From: Mika Kuoppala To: intel-gfx@lists.freedesktop.org Date: Thu, 20 Sep 2018 17:33:50 +0300 Message-Id: <20180920143350.29249-11-mika.kuoppala@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180920143350.29249-1-mika.kuoppala@linux.intel.com> References: <20180920143350.29249-1-mika.kuoppala@linux.intel.com> Subject: [Intel-gfx] [PATCH 10/10] drm/i915/icl: Only ack irq identities we did handle X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP If we ack the identities immediately after they have been handled, it should unblock next interrupt accumulation in the gathering register earlier. It also allows us to remove time based polling of valid bit. If we don't get a valid sample now, we will likely get a valid sample on next interrupt, which will be generated due to skipping the ack. The downside is that we will have as many ack writes as there were identities handled. Leave small retry loop for safety and with debugs to see if we ever encounter read with valid not set. Cc: Daniele Ceraolo Spurio Cc: Chris Wilson Signed-off-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_irq.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 27116e3f21af..beb9fe4abf1f 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2965,22 +2965,18 @@ gen11_gt_engine_identity(struct drm_i915_private * const i915, const unsigned int bank, const unsigned int bit) { void __iomem * const regs = i915->regs; - u32 timeout_ts; - u32 ident; + u32 ident, retry = 0; lockdep_assert_held(&i915->irq_lock); raw_reg_write(regs, GEN11_IIR_REG_SELECTOR(bank), BIT(bit)); - /* - * NB: Specs do not specify how long to spin wait, - * so we do ~100us as an educated guess. - */ - timeout_ts = (local_clock() >> 10) + 100; do { ident = raw_reg_read(regs, GEN11_INTR_IDENTITY_REG(bank)); - } while (!(ident & GEN11_INTR_DATA_VALID) && - !time_after32(local_clock() >> 10, timeout_ts)); + } while (!(ident & GEN11_INTR_DATA_VALID) && ++retry <= 10); + + if (unlikely(GEM_SHOW_DEBUG() && retry)) + WARN_ONCE(1, "INTR_IDENTITY took %u reads to settle\n", retry); if (unlikely(!(ident & GEN11_INTR_DATA_VALID))) { DRM_ERROR("INTR_IDENTITY_REG%u:%u 0x%08x not valid!\n", @@ -3031,9 +3027,6 @@ gen11_gt_identity_handler(struct drm_i915_private * const i915, const u8 instance = GEN11_INTR_ENGINE_INSTANCE(identity); const u16 intr = GEN11_INTR_ENGINE_INTR(identity); - if (unlikely(!intr)) - return; - if (class <= COPY_ENGINE_CLASS) return gen11_engine_irq_handler(i915, class, instance, intr); @@ -3065,11 +3058,14 @@ gen11_gt_bank_handler(struct drm_i915_private * const i915, const u32 ident = gen11_gt_engine_identity(i915, bank, bit); + if (unlikely(!ident)) + continue; + gen11_gt_identity_handler(i915, ident); - } - /* Clear must be after shared has been served for engine */ - raw_reg_write(regs, GEN11_GT_INTR_DW(bank), intr_dw); + /* Clear must be after shared has been served for engine */ + raw_reg_write(regs, GEN11_GT_INTR_DW(bank), BIT(bit)); + } } static void