From patchwork Wed Oct 3 12:07:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 10624729 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5C35114BD for ; Wed, 3 Oct 2018 12:07:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4EDD428942 for ; Wed, 3 Oct 2018 12:07:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 433102896A; Wed, 3 Oct 2018 12:07:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D9AC828942 for ; Wed, 3 Oct 2018 12:07:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1CBF56E457; Wed, 3 Oct 2018 12:07:28 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) by gabe.freedesktop.org (Postfix) with ESMTPS id 366F96E44B for ; Wed, 3 Oct 2018 12:07:27 +0000 (UTC) Received: by mail-wm1-x341.google.com with SMTP id o18-v6so5395255wmc.0 for ; Wed, 03 Oct 2018 05:07:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jVCouqac4HASZ43tMJzWkI+GfgbSX7lwvDUnvEvefLI=; b=ichp/mgo5HVcOropcZEmd4GPkP/lAxHS4jI2ksGx6igqtaqSjSfuh+qg2Rt+r25Rua X+YYb0JblSA8xpF4bK7esybGcW3OVw7Vw22OTz2sVPD0mHX87lV7Ty2WJqm4Z/qQm3ku k+rUIpIJBI728mLeegESo7SzqqA6TW4QR8AfV096r3B4VOwATYZxdV4MqObfZTtM4+Ed /p3PwdGDM+ODTbrOj2A+GzZo+keVMfn2k4dX98nO+QCf7qhZufvMVZleKSqEahiggCyr Earf7ZSYiJKyChK0czguBi/Ur9V067uPwUo1thg2F0+q201slUdWG91u2uMHNWd1GWvh srtA== X-Gm-Message-State: ABuFfoiOfq/ITvehlbEYqBerrdexLdHdB6Bz9DO1qq6L1JNDre4hxC+J JDjWgB59C7jERDIPNtwuMbYUgA== X-Google-Smtp-Source: ACcGV61TT8bCDetS6XtNOSYg/seGVj00jwkce4kog78kPGBsjFUxwVNoFVWnPA2B69fgxCo4SOv1mg== X-Received: by 2002:a1c:e583:: with SMTP id c125-v6mr1310152wmh.134.1538568445818; Wed, 03 Oct 2018 05:07:25 -0700 (PDT) Received: from localhost.localdomain ([95.144.165.37]) by smtp.gmail.com with ESMTPSA id u191-v6sm1627707wmd.31.2018.10.03.05.07.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Oct 2018 05:07:25 -0700 (PDT) From: Tvrtko Ursulin X-Google-Original-From: Tvrtko Ursulin To: igt-dev@lists.freedesktop.org Date: Wed, 3 Oct 2018 13:07:14 +0100 Message-Id: <20181003120718.6898-3-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181003120718.6898-1-tvrtko.ursulin@linux.intel.com> References: <20181003120718.6898-1-tvrtko.ursulin@linux.intel.com> Subject: [Intel-gfx] [RFC i-g-t 2/6] intel-gpu-overlay: Add engine queue stats X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Intel-gfx@lists.freedesktop.org MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin Use new PMU engine queue stats (queued, runnable and running) and display them per engine. v2: * Compact per engine stats. (Chris Wilson) Signed-off-by: Tvrtko Ursulin --- overlay/gpu-top.c | 42 ++++++++++++++++++++++++++++++++++++++++++ overlay/gpu-top.h | 11 +++++++++++ overlay/overlay.c | 7 +++++++ 3 files changed, 60 insertions(+) diff --git a/overlay/gpu-top.c b/overlay/gpu-top.c index 61b8f62fd78c..22e9badb22c1 100644 --- a/overlay/gpu-top.c +++ b/overlay/gpu-top.c @@ -72,6 +72,18 @@ static int perf_init(struct gpu_top *gt) gt->fd) >= 0) gt->have_sema = 1; + if (perf_i915_open_group(I915_PMU_ENGINE_QUEUED(d->class, d->inst), + gt->fd) >= 0) + gt->have_queued = 1; + + if (perf_i915_open_group(I915_PMU_ENGINE_RUNNABLE(d->class, d->inst), + gt->fd) >= 0) + gt->have_runnable = 1; + + if (perf_i915_open_group(I915_PMU_ENGINE_RUNNING(d->class, d->inst), + gt->fd) >= 0) + gt->have_running = 1; + gt->ring[0].name = d->name; gt->num_rings = 1; @@ -93,6 +105,24 @@ static int perf_init(struct gpu_top *gt) gt->fd) < 0) return -1; + if (gt->have_queued && + perf_i915_open_group(I915_PMU_ENGINE_QUEUED(d->class, + d->inst), + gt->fd) < 0) + return -1; + + if (gt->have_runnable && + perf_i915_open_group(I915_PMU_ENGINE_RUNNABLE(d->class, + d->inst), + gt->fd) < 0) + return -1; + + if (gt->have_running && + perf_i915_open_group(I915_PMU_ENGINE_RUNNING(d->class, + d->inst), + gt->fd) < 0) + return -1; + gt->ring[gt->num_rings++].name = d->name; } @@ -298,6 +328,12 @@ int gpu_top_update(struct gpu_top *gt) s->wait[n] = sample[m++]; if (gt->have_sema) s->sema[n] = sample[m++]; + if (gt->have_queued) + s->queued[n] = sample[m++]; + if (gt->have_runnable) + s->runnable[n] = sample[m++]; + if (gt->have_running) + s->running[n] = sample[m++]; } if (gt->count == 1) @@ -310,6 +346,12 @@ int gpu_top_update(struct gpu_top *gt) gt->ring[n].u.u.wait = (100 * (s->wait[n] - d->wait[n]) + d_time/2) / d_time; if (gt->have_sema) gt->ring[n].u.u.sema = (100 * (s->sema[n] - d->sema[n]) + d_time/2) / d_time; + if (gt->have_queued) + gt->ring[n].queued = (double)((s->queued[n] - d->queued[n])) / I915_SAMPLE_QUEUED_DIVISOR * 1e9 / d_time; + if (gt->have_runnable) + gt->ring[n].runnable = (double)((s->runnable[n] - d->runnable[n])) / I915_SAMPLE_RUNNABLE_DIVISOR * 1e9 / d_time; + if (gt->have_running) + gt->ring[n].running = (double)((s->running[n] - d->running[n])) / I915_SAMPLE_RUNNING_DIVISOR * 1e9 / d_time; /* in case of rounding + sampling errors, fudge */ if (gt->ring[n].u.u.busy > 100) diff --git a/overlay/gpu-top.h b/overlay/gpu-top.h index d3cdd779760f..cb4310c82a94 100644 --- a/overlay/gpu-top.h +++ b/overlay/gpu-top.h @@ -36,6 +36,9 @@ struct gpu_top { int num_rings; int have_wait; int have_sema; + int have_queued; + int have_runnable; + int have_running; struct gpu_top_ring { const char *name; @@ -47,6 +50,10 @@ struct gpu_top { } u; uint32_t payload; } u; + + double queued; + double runnable; + double running; } ring[MAX_RINGS]; struct gpu_top_stat { @@ -54,7 +61,11 @@ struct gpu_top { uint64_t busy[MAX_RINGS]; uint64_t wait[MAX_RINGS]; uint64_t sema[MAX_RINGS]; + uint64_t queued[MAX_RINGS]; + uint64_t runnable[MAX_RINGS]; + uint64_t running[MAX_RINGS]; } stat[2]; + int count; }; diff --git a/overlay/overlay.c b/overlay/overlay.c index eae5ddfa8823..7087d5e5b24e 100644 --- a/overlay/overlay.c +++ b/overlay/overlay.c @@ -256,6 +256,13 @@ static void show_gpu_top(struct overlay_context *ctx, struct overlay_gpu_top *gt len = sprintf(txt, "%s: %3d%% busy", gt->gpu_top.ring[n].name, gt->gpu_top.ring[n].u.u.busy); + if (gt->gpu_top.have_queued && + gt->gpu_top.have_runnable && + gt->gpu_top.have_running) + len += sprintf(txt + len, " (%.2f / %.2f / %.2f)", + gt->gpu_top.ring[n].queued, + gt->gpu_top.ring[n].runnable, + gt->gpu_top.ring[n].running); if (gt->gpu_top.ring[n].u.u.wait) len += sprintf(txt + len, ", %d%% wait", gt->gpu_top.ring[n].u.u.wait);