From patchwork Wed Oct 10 13:04:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 10634529 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7167B16B1 for ; Wed, 10 Oct 2018 13:05:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 660E129E3D for ; Wed, 10 Oct 2018 13:05:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5A51929E3F; Wed, 10 Oct 2018 13:05:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E68C329E3D for ; Wed, 10 Oct 2018 13:05:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EC3B96E188; Wed, 10 Oct 2018 13:05:41 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3F9536E125 for ; Wed, 10 Oct 2018 13:05:39 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Oct 2018 06:05:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,364,1534834800"; d="scan'208";a="97958297" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by fmsmga001.fm.intel.com with SMTP; 10 Oct 2018 06:05:05 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 10 Oct 2018 16:05:03 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 10 Oct 2018 16:04:45 +0300 Message-Id: <20181010130454.28557-4-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20181010130454.28557-1-ville.syrjala@linux.intel.com> References: <20181010130454.28557-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 03/12] drm/i915: Eliminate skl_latency[] X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä Make SKL+ less special by eliminating the separate skl_latency[] array and just using the normal pri/spr/cur latency arrays. The result is 4 bytes larger (3*5+8 vs. 3*8) Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_debugfs.c | 42 +++++------------------------ drivers/gpu/drm/i915/i915_drv.h | 8 +++--- drivers/gpu/drm/i915/intel_pm.c | 16 ++++++----- 3 files changed, 20 insertions(+), 46 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 35b4c49c9bca..e4b668f28ec0 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -3817,12 +3817,7 @@ static void wm_latency_show(struct seq_file *m, const uint16_t wm[8]) static int pri_wm_latency_show(struct seq_file *m, void *data) { struct drm_i915_private *dev_priv = m->private; - const uint16_t *latencies; - - if (INTEL_GEN(dev_priv) >= 9) - latencies = dev_priv->wm.skl_latency; - else - latencies = dev_priv->wm.pri_latency; + const u16 *latencies = dev_priv->wm.pri_latency; wm_latency_show(m, latencies); @@ -3832,12 +3827,7 @@ static int pri_wm_latency_show(struct seq_file *m, void *data) static int spr_wm_latency_show(struct seq_file *m, void *data) { struct drm_i915_private *dev_priv = m->private; - const uint16_t *latencies; - - if (INTEL_GEN(dev_priv) >= 9) - latencies = dev_priv->wm.skl_latency; - else - latencies = dev_priv->wm.spr_latency; + const u16 *latencies = dev_priv->wm.spr_latency; wm_latency_show(m, latencies); @@ -3847,12 +3837,7 @@ static int spr_wm_latency_show(struct seq_file *m, void *data) static int cur_wm_latency_show(struct seq_file *m, void *data) { struct drm_i915_private *dev_priv = m->private; - const uint16_t *latencies; - - if (INTEL_GEN(dev_priv) >= 9) - latencies = dev_priv->wm.skl_latency; - else - latencies = dev_priv->wm.cur_latency; + const u16 *latencies = dev_priv->wm.cur_latency; wm_latency_show(m, latencies); @@ -3940,12 +3925,7 @@ static ssize_t pri_wm_latency_write(struct file *file, const char __user *ubuf, { struct seq_file *m = file->private_data; struct drm_i915_private *dev_priv = m->private; - uint16_t *latencies; - - if (INTEL_GEN(dev_priv) >= 9) - latencies = dev_priv->wm.skl_latency; - else - latencies = dev_priv->wm.pri_latency; + u16 *latencies = dev_priv->wm.pri_latency; return wm_latency_write(file, ubuf, len, offp, latencies); } @@ -3955,12 +3935,7 @@ static ssize_t spr_wm_latency_write(struct file *file, const char __user *ubuf, { struct seq_file *m = file->private_data; struct drm_i915_private *dev_priv = m->private; - uint16_t *latencies; - - if (INTEL_GEN(dev_priv) >= 9) - latencies = dev_priv->wm.skl_latency; - else - latencies = dev_priv->wm.spr_latency; + u16 *latencies = dev_priv->wm.spr_latency; return wm_latency_write(file, ubuf, len, offp, latencies); } @@ -3970,12 +3945,7 @@ static ssize_t cur_wm_latency_write(struct file *file, const char __user *ubuf, { struct seq_file *m = file->private_data; struct drm_i915_private *dev_priv = m->private; - uint16_t *latencies; - - if (INTEL_GEN(dev_priv) >= 9) - latencies = dev_priv->wm.skl_latency; - else - latencies = dev_priv->wm.cur_latency; + u16 *latencies = dev_priv->wm.cur_latency; return wm_latency_write(file, ubuf, len, offp, latencies); } diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index e57b8cb8fa4d..4dc8826f24b2 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1907,10 +1907,10 @@ struct drm_i915_private { struct { /* Watermark memory latency values in 0.1 us units */ - uint16_t pri_latency[5]; - uint16_t spr_latency[5]; - uint16_t cur_latency[5]; - uint16_t skl_latency[8]; + /* Watermark memory latency values in .1 us units */ + u16 pri_latency[8]; + u16 spr_latency[8]; + u16 cur_latency[8]; /* current hardware state */ union { diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index fe522ceae97a..4bb640acf291 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -827,9 +827,6 @@ static int intel_plane_wm_latency(struct intel_plane *plane, { struct drm_i915_private *dev_priv = to_i915(plane->base.dev); - if (INTEL_GEN(dev_priv) >= 9) - return dev_priv->wm.skl_latency[level]; - switch (plane->id) { case PLANE_PRIMARY: return dev_priv->wm.pri_latency[level]; @@ -3064,11 +3061,18 @@ static void skl_fixup_wm_latency_units(struct drm_i915_private *dev_priv, static void skl_setup_wm_latency(struct drm_i915_private *dev_priv) { - intel_read_wm_latency(dev_priv, dev_priv->wm.skl_latency); + intel_read_wm_latency(dev_priv, dev_priv->wm.pri_latency); - skl_fixup_wm_latency_units(dev_priv, dev_priv->wm.skl_latency); + skl_fixup_wm_latency_units(dev_priv, dev_priv->wm.pri_latency); - intel_print_wm_latency(dev_priv, "Gen9 Plane", dev_priv->wm.skl_latency); + memcpy(dev_priv->wm.spr_latency, dev_priv->wm.pri_latency, + sizeof(dev_priv->wm.pri_latency)); + memcpy(dev_priv->wm.cur_latency, dev_priv->wm.pri_latency, + sizeof(dev_priv->wm.pri_latency)); + + intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency); + intel_print_wm_latency(dev_priv, "Sprite", dev_priv->wm.spr_latency); + intel_print_wm_latency(dev_priv, "Cursor", dev_priv->wm.cur_latency); } static bool ilk_validate_pipe_wm(struct drm_device *dev,