From patchwork Fri Oct 12 21:52:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639341 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 447C01508 for ; Fri, 12 Oct 2018 21:52:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 435D22BF80 for ; Fri, 12 Oct 2018 21:52:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 37D882BF86; Fri, 12 Oct 2018 21:52:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D691B2BF80 for ; Fri, 12 Oct 2018 21:52:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DA6486E515; Fri, 12 Oct 2018 21:52:33 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id BA6626E4A3 for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80806994" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:14 -0700 Message-Id: <20181012215218.5119-12-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 12/16] drm/i915: Warn when display irq functions is executed when display is disabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP With previous changes none of those warnings will be printed but lets add then so CI can caught regressions. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/i915_irq.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/intel_hotplug.c | 2 ++ 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index e7f551909bfe..92e2c7e081e5 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2029,6 +2029,8 @@ static u32 i9xx_hpd_irq_ack(struct drm_i915_private *dev_priv) u32 hotplug_status = 0, hotplug_status_mask; int i; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) hotplug_status_mask = HOTPLUG_INT_STATUS_G4X | @@ -2067,6 +2069,8 @@ static void i9xx_hpd_irq_handler(struct drm_i915_private *dev_priv, { u32 pin_mask = 0, long_mask = 0; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X; @@ -2511,6 +2515,8 @@ static void ilk_display_irq_handler(struct drm_i915_private *dev_priv, enum pipe pipe; u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + if (hotplug_trigger) ilk_hpd_irq_handler(dev_priv, hotplug_trigger, hpd_ilk); @@ -2557,6 +2563,8 @@ static void ivb_display_irq_handler(struct drm_i915_private *dev_priv, enum pipe pipe; u32 hotplug_trigger = de_iir & DE_DP_A_HOTPLUG_IVB; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + if (hotplug_trigger) ilk_hpd_irq_handler(dev_priv, hotplug_trigger, hpd_ivb); @@ -2725,6 +2733,8 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) u32 iir; enum pipe pipe; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + if (master_ctl & GEN8_DE_MISC_IRQ) { iir = I915_READ(GEN8_DE_MISC_IIR); if (iir) { @@ -3875,6 +3885,8 @@ static void spt_hpd_irq_setup(struct drm_i915_private *dev_priv) { u32 hotplug_irqs, enabled_irqs; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + hotplug_irqs = SDE_HOTPLUG_MASK_SPT; enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_spt); @@ -3903,6 +3915,8 @@ static void ilk_hpd_irq_setup(struct drm_i915_private *dev_priv) { u32 hotplug_irqs, enabled_irqs; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + if (INTEL_GEN(dev_priv) >= 8) { hotplug_irqs = GEN8_PORT_DP_A_HOTPLUG; enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_bdw); @@ -3965,6 +3979,8 @@ static void bxt_hpd_irq_setup(struct drm_i915_private *dev_priv) { u32 hotplug_irqs, enabled_irqs; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_bxt); hotplug_irqs = BXT_DE_PORT_HOTPLUG_MASK; @@ -4682,6 +4698,8 @@ static void i915_hpd_irq_setup(struct drm_i915_private *dev_priv) { u32 hotplug_en; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + lockdep_assert_held(&dev_priv->irq_lock); /* Note HDMI and DP share hotplug bits */ diff --git a/drivers/gpu/drm/i915/intel_hotplug.c b/drivers/gpu/drm/i915/intel_hotplug.c index 648a13c6043c..908d8e589f9a 100644 --- a/drivers/gpu/drm/i915/intel_hotplug.c +++ b/drivers/gpu/drm/i915/intel_hotplug.c @@ -399,6 +399,8 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv, if (!pin_mask) return; + WARN_ON_ONCE(!INTEL_INFO(dev_priv)->num_pipes); + spin_lock(&dev_priv->irq_lock); for_each_intel_encoder(&dev_priv->drm, encoder) { enum hpd_pin pin = encoder->hpd_pin;