From patchwork Fri Oct 12 21:52:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 10639321 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7303C1508 for ; Fri, 12 Oct 2018 21:52:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 71CD32BF80 for ; Fri, 12 Oct 2018 21:52:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 662182BF86; Fri, 12 Oct 2018 21:52:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1CB942BF80 for ; Fri, 12 Oct 2018 21:52:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D4D8A6E4EB; Fri, 12 Oct 2018 21:52:31 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id CDD126E4EB for ; Fri, 12 Oct 2018 21:52:29 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Oct 2018 14:52:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,374,1534834800"; d="scan'208";a="80807001" Received: from josouza-mobl.jf.intel.com ([10.24.11.2]) by orsmga007.jf.intel.com with ESMTP; 12 Oct 2018 14:52:28 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Fri, 12 Oct 2018 14:52:16 -0700 Message-Id: <20181012215218.5119-14-jose.souza@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181012215218.5119-1-jose.souza@intel.com> References: <20181012215218.5119-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 14/16] drm/i915: Do not turn power wells on or off when display is disabled X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP There is just two power wells calls left after the previous changes: - POWER_DOMAIN_INIT: used in load, unload, resume and suspend driver paths - POWER_DOMAIN_GT_IRQ: used by GEM to reduce interrupt latencies when DMC is loaded Instead of adding several more 'if (INTEL_INFO(dev_priv)->num_pipes)' it will be handled in intel_display_power_get/put() and if any erroneous call is added later a error message will be printed making easy get regressions. Other important point is that it will not turn power wells on or off but it will still grab and release runtime power management references this way kernel can power down the whole GPU when it is not in use. Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/intel_runtime_pm.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 629091ad8337..56c65d921acd 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -1524,6 +1524,9 @@ __intel_display_power_get_domain(struct drm_i915_private *dev_priv, struct i915_power_domains *power_domains = &dev_priv->power_domains; struct i915_power_well *power_well; + if (!INTEL_INFO(dev_priv)->num_pipes) + DRM_ERROR("Enabling a power well with display disabled"); + for_each_power_domain_well(dev_priv, power_well, BIT_ULL(domain)) intel_power_well_get(dev_priv, power_well); @@ -1549,6 +1552,13 @@ void intel_display_power_get(struct drm_i915_private *dev_priv, intel_runtime_pm_get(dev_priv); + /* With display disabled this should be the only 2 power domains + * requested + */ + if ((domain == POWER_DOMAIN_INIT || domain == POWER_DOMAIN_GT_IRQ) && + !INTEL_INFO(dev_priv)->num_pipes) + return; + mutex_lock(&power_domains->lock); __intel_display_power_get_domain(dev_priv, domain); @@ -1609,6 +1619,10 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, struct i915_power_domains *power_domains; struct i915_power_well *power_well; + if ((domain == POWER_DOMAIN_INIT || domain == POWER_DOMAIN_GT_IRQ) && + !INTEL_INFO(dev_priv)->num_pipes) + goto end; + power_domains = &dev_priv->power_domains; mutex_lock(&power_domains->lock); @@ -1623,6 +1637,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, mutex_unlock(&power_domains->lock); +end: intel_runtime_pm_put(dev_priv); }