From patchwork Thu Nov 1 15:06:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 10664077 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D92691734 for ; Thu, 1 Nov 2018 15:06:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C74122BDC8 for ; Thu, 1 Nov 2018 15:06:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BBC202BF4E; Thu, 1 Nov 2018 15:06:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7494D2BDC8 for ; Thu, 1 Nov 2018 15:06:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0E4C36E3EC; Thu, 1 Nov 2018 15:06:45 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 628896E3EC for ; Thu, 1 Nov 2018 15:06:43 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Nov 2018 08:06:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,452,1534834800"; d="scan'208";a="92960561" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by FMSMGA003.fm.intel.com with SMTP; 01 Nov 2018 08:06:41 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 01 Nov 2018 17:06:40 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Thu, 1 Nov 2018 17:06:03 +0200 Message-Id: <20181101150605.18235-13-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: <20181101150605.18235-1-ville.syrjala@linux.intel.com> References: <20181101150605.18235-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 12/14] drm/i915: Remove some useless zeroing on skl+ wm calculations X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Ville Syrjälä We memset(0) the entire watermark struct the start, so there's no need to clear things later on. Signed-off-by: Ville Syrjälä Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_pm.c | 20 +++++--------------- 1 file changed, 5 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index bd5f16bc7e08..b0720994fa0a 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4706,10 +4706,8 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, if (latency == 0) return level == 0 ? -EINVAL : 0; - if (!intel_wm_plane_visible(cstate, intel_pstate)) { - result->plane_en = false; + if (!intel_wm_plane_visible(cstate, intel_pstate)) return 0; - } /* Display WA #1141: kbl,cfl */ if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || @@ -4806,8 +4804,6 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, if ((level > 0 && res_lines > 31) || res_blocks >= ddb_allocation || min_disp_buf_needed >= ddb_allocation) { - result->plane_en = false; - /* * If there are no valid level 0 watermarks, then we can't * support this display configuration. @@ -4831,10 +4827,8 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, */ if (wp->is_planar && level >= 1 && (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) || - IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))) { - result->plane_en = false; + IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))) return 0; - } /* The number of lines are ignored for the level 0 watermark. */ result->plane_res_b = res_blocks; @@ -4920,15 +4914,15 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *cstate, uint16_t wm0_sel_res_b, trans_offset_b, res_blocks; if (!cstate->base.active) - goto exit; + return; /* Transition WM are not recommended by HW team for GEN9 */ if (INTEL_GEN(dev_priv) <= 9) - goto exit; + return; /* Transition WM don't make any sense if ipc is disabled */ if (!dev_priv->ipc_enabled) - goto exit; + return; trans_min = 14; if (INTEL_GEN(dev_priv) >= 11) @@ -4967,11 +4961,7 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *cstate, if (res_blocks < ddb_allocation) { trans_wm->plane_res_b = res_blocks; trans_wm->plane_en = true; - return; } - -exit: - trans_wm->plane_en = false; } static int __skl_build_plane_wm_single(struct skl_ddb_allocation *ddb,