Message ID | 20181128202628.20238-1-manasi.d.navare@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [CI,v13,01/17] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state | expand |
Pushed to dinq, thanks for the patch and the review. Manasi On Wed, Nov 28, 2018 at 12:26:12PM -0800, Manasi Navare wrote: > Basic DSC parameters and DSC configuration data needs to be computed > for each of the requested mode during atomic check. This is > required since for certain modes, valid DSC parameters and config > data might not be computed in which case compression cannot be > enabled for that mode. > For that reason we need to add these params and config structure > to the intel_crtc_state so that if valid this state information > can directly be used while enabling DSC in atomic commit. > > v2: > * Rebase on drm-tip (Manasi) > > Cc: Gaurav K Singh <gaurav.k.singh@intel.com> > Cc: Jani Nikula <jani.nikula@linux.intel.com> > Cc: Ville Syrjala <ville.syrjala@linux.intel.com> > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/intel_drv.h | 9 +++++++++ > 2 files changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index f763b30f98d9..183aae996305 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -53,6 +53,7 @@ > #include <drm/drm_auth.h> > #include <drm/drm_cache.h> > #include <drm/drm_util.h> > +#include <drm/drm_dsc.h> > > #include "i915_fixed.h" > #include "i915_params.h" > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index a62d77b76291..270212fa43a0 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -937,6 +937,15 @@ struct intel_crtc_state { > > /* Output down scaling is done in LSPCON device */ > bool lspcon_downsampling; > + > + /* Display Stream compression state */ > + struct { > + bool compression_enable; > + bool dsc_split; > + u16 compressed_bpp; > + u8 slice_count; > + } dsc_params; > + struct drm_dsc_config dp_dsc_cfg; > }; > > struct intel_crtc { > -- > 2.19.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f763b30f98d9..183aae996305 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -53,6 +53,7 @@ #include <drm/drm_auth.h> #include <drm/drm_cache.h> #include <drm/drm_util.h> +#include <drm/drm_dsc.h> #include "i915_fixed.h" #include "i915_params.h" diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index a62d77b76291..270212fa43a0 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -937,6 +937,15 @@ struct intel_crtc_state { /* Output down scaling is done in LSPCON device */ bool lspcon_downsampling; + + /* Display Stream compression state */ + struct { + bool compression_enable; + bool dsc_split; + u16 compressed_bpp; + u8 slice_count; + } dsc_params; + struct drm_dsc_config dp_dsc_cfg; }; struct intel_crtc {