From patchwork Fri Nov 30 11:31:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 10706167 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 79F0914D6 for ; Fri, 30 Nov 2018 11:32:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 69FB52FF87 for ; Fri, 30 Nov 2018 11:32:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5E6C82FF8C; Fri, 30 Nov 2018 11:32:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 00BDA2FF87 for ; Fri, 30 Nov 2018 11:32:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 744A86E5FC; Fri, 30 Nov 2018 11:32:26 +0000 (UTC) X-Original-To: Intel-gfx@lists.freedesktop.org Delivered-To: Intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id C86426E5F7 for ; Fri, 30 Nov 2018 11:32:13 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Nov 2018 03:32:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,298,1539673200"; d="scan'208";a="96250395" Received: from bmolloy-mobl.ger.corp.intel.com (HELO localhost.localdomain) ([10.252.10.213]) by orsmga006.jf.intel.com with ESMTP; 30 Nov 2018 03:32:12 -0800 From: Tvrtko Ursulin To: Intel-gfx@lists.freedesktop.org Date: Fri, 30 Nov 2018 11:31:56 +0000 Message-Id: <20181130113201.13007-4-tvrtko.ursulin@linux.intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181130113201.13007-1-tvrtko.ursulin@linux.intel.com> References: <20181130113201.13007-1-tvrtko.ursulin@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/8] drm/i915: Verify GT workaround state at runtime X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Tvrtko Ursulin Since we now have all the GT workarounds in a table, by adding a simple shared helper function we can now verify that their values are still applied after some interesting events in the lifetime of the driver. At this stage these are the driver initialization and engine reset. Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.c | 4 +++ drivers/gpu/drm/i915/i915_gem.c | 3 ++ drivers/gpu/drm/i915/intel_workarounds.c | 46 ++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_workarounds.h | 2 ++ 4 files changed, 55 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 2f3dc1cf83a6..14d019c9455b 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -53,6 +53,7 @@ #include "i915_vgpu.h" #include "intel_drv.h" #include "intel_uc.h" +#include "intel_workarounds.h" static struct drm_driver driver; @@ -2362,6 +2363,9 @@ int i915_reset_engine(struct intel_engine_cs *engine, const char *msg) goto out; } + /* Catch GT workarounds affected by engine reset. */ + intel_gt_workarounds_verify(engine->i915, engine->name); + /* * The request that caused the hang is stuck on elsp, we know the * active request and can drop it, adjust head to skip the offending diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 18adb3dd1fcd..1eff471d4366 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -5334,7 +5334,10 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv) I915_WRITE(MI_PREDICATE_RESULT_2, IS_HSW_GT3(dev_priv) ? LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED); + /* Apply the GT workarounds... */ intel_gt_workarounds_apply(dev_priv); + /* ...and determine whether they are sticking. */ + intel_gt_workarounds_verify(dev_priv, "init"); i915_gem_init_swizzling(dev_priv); diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index be63a2af3481..a5c0d206b2a4 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -981,6 +981,52 @@ void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv) wa_list_apply(dev_priv, &dev_priv->gt_wa_list); } +static void +wa_fail(const struct i915_wa *wa, u32 cur, const char *name, const char *from) +{ + DRM_ERROR("%s workaround lost on %s! (%x=%x/%x, expected %x, mask=%x)\n", + name, from, + i915_mmio_reg_offset(wa->reg), + cur, cur & wa->mask, wa->val, wa->mask); +} + +static void +wa_verify_bits(const struct i915_wa *wa, u32 cur, const char *name, + const char *from) +{ + u32 bits = wa->mask; + u32 cur_ = cur; + u32 val_ = wa->val; + + while (bits) { + if ((bits & 1) && ((cur_ & 1) != (val_ & 1))) { + wa_fail(wa, cur, name, from); + break; + } + + bits >>= 1; + cur_ >>= 1; + val_ >>= 1; + } +} + +static void wa_list_verify(struct drm_i915_private *dev_priv, + const struct i915_wa_list *wal, + const char *from) +{ + struct i915_wa *wa; + unsigned int i; + + for (i = 0, wa = wal->list; i < wal->count; i++, wa++) + wa_verify_bits(wa, I915_READ(wa->reg), wal->name, from); +} + +void intel_gt_workarounds_verify(struct drm_i915_private *dev_priv, + const char *from) +{ + wa_list_verify(dev_priv, &dev_priv->gt_wa_list, from); +} + struct whitelist { i915_reg_t reg[RING_MAX_NONPRIV_SLOTS]; unsigned int count; diff --git a/drivers/gpu/drm/i915/intel_workarounds.h b/drivers/gpu/drm/i915/intel_workarounds.h index 2998767d51ca..845c18dc110d 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.h +++ b/drivers/gpu/drm/i915/intel_workarounds.h @@ -33,6 +33,8 @@ int intel_ctx_workarounds_emit(struct i915_request *rq); void intel_gt_workarounds_init(struct drm_i915_private *dev_priv); void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv); +void intel_gt_workarounds_verify(struct drm_i915_private *dev_priv, + const char *from); void intel_whitelist_workarounds_apply(struct intel_engine_cs *engine);