From patchwork Sat Jan 5 02:40:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Santa, Carlos" X-Patchwork-Id: 10749109 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 65C8B6C2 for ; Sat, 5 Jan 2019 02:40:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 547DA28717 for ; Sat, 5 Jan 2019 02:40:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 48D3C28761; Sat, 5 Jan 2019 02:40:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E842628717 for ; Sat, 5 Jan 2019 02:40:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 12DEC6ED47; Sat, 5 Jan 2019 02:40:14 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6DF4D6E642 for ; Sat, 5 Jan 2019 02:40:12 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Jan 2019 18:40:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,441,1539673200"; d="scan'208";a="264547430" Received: from miryad.jf.intel.com ([10.54.74.35]) by orsmga004.jf.intel.com with ESMTP; 04 Jan 2019 18:40:12 -0800 From: Carlos Santa To: intel-gfx@lists.freedesktop.org Date: Fri, 4 Jan 2019 18:40:00 -0800 Message-Id: <20190105024001.37629-8-carlos.santa@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190105024001.37629-1-carlos.santa@intel.com> References: <20190105024001.37629-1-carlos.santa@intel.com> Subject: [Intel-gfx] drm/i915/watchdog: move emit_stop_watchdog until the very end of the ring commands X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michel Thierry MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Michel Thierry On command streams that could potentially hang the GPU after a last flush command, it's best not to cancel the watchdog until after all commands have executed. Patch shared by Michel Thierry through IIRC after reproduction on my local setup. Tested-by: Carlos Santa CC: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/intel_lrc.c | 53 +++++++++++++++++++++++++++----- 1 file changed, 45 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 0afcbeb18329..25ba5fcc9466 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1885,8 +1885,8 @@ static int gen8_emit_bb_start(struct i915_request *rq, GEM_BUG_ON(!engine->emit_start_watchdog || !engine->emit_stop_watchdog); - /* + start_watchdog (6) + stop_watchdog (4) */ - num_dwords += 10; + /* + start_watchdog (6) */ + num_dwords += 6; watchdog_running = true; } @@ -1927,10 +1927,7 @@ static int gen8_emit_bb_start(struct i915_request *rq, *cs++ = MI_ARB_ON_OFF | MI_ARB_DISABLE; *cs++ = MI_NOOP; - if (watchdog_running) { - /* Cancel watchdog timer */ - cs = engine->emit_stop_watchdog(rq, cs); - } + // XXX: emit_stop_watchdog happens in gen8_emit_breadcrumb_vcs intel_ring_advance(rq, cs); return 0; @@ -2189,6 +2186,37 @@ static void gen8_emit_breadcrumb(struct i915_request *request, u32 *cs) } static const int gen8_emit_breadcrumb_sz = 6 + WA_TAIL_DWORDS; +static void gen8_emit_breadcrumb_vcs(struct i915_request *request, u32 *cs) +{ + /* w/a: bit 5 needs to be zero for MI_FLUSH_DW address. */ + BUILD_BUG_ON(I915_GEM_HWS_INDEX_ADDR & (1 << 5)); + + cs = gen8_emit_ggtt_write(cs, request->global_seqno, + intel_hws_seqno_address(request->engine)); + *cs++ = MI_USER_INTERRUPT; + *cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE; + + // stop_watchdog at the very end of the ring commands + if (request->gem_context->__engine[VCS].watchdog_threshold != 0) + { + /* Cancel watchdog timer */ + GEM_BUG_ON(!request->engine->emit_stop_watchdog); + cs = request->engine->emit_stop_watchdog(request, cs); + } + else + { + *cs++ = MI_NOOP; + *cs++ = MI_NOOP; + *cs++ = MI_NOOP; + *cs++ = MI_NOOP; + } + + request->tail = intel_ring_offset(request, cs); + assert_ring_tail_valid(request->ring, request->tail); + gen8_emit_wa_tail(request, cs); +} +static const int gen8_emit_breadcrumb_vcs_sz = 6 + WA_TAIL_DWORDS + 4; //+4 for optional stop_watchdog + static void gen8_emit_breadcrumb_rcs(struct i915_request *request, u32 *cs) { /* We're using qword write, seqno should be aligned to 8 bytes. */ @@ -2306,8 +2334,17 @@ logical_ring_default_vfuncs(struct intel_engine_cs *engine) engine->request_alloc = execlists_request_alloc; engine->emit_flush = gen8_emit_flush; - engine->emit_breadcrumb = gen8_emit_breadcrumb; - engine->emit_breadcrumb_sz = gen8_emit_breadcrumb_sz; + + if (engine->id == VCS || engine->id == VCS2) + { + engine->emit_breadcrumb = gen8_emit_breadcrumb_vcs; + engine->emit_breadcrumb_sz = gen8_emit_breadcrumb_vcs_sz; + } + else + { + engine->emit_breadcrumb = gen8_emit_breadcrumb; + engine->emit_breadcrumb_sz = gen8_emit_breadcrumb_sz; + } engine->set_default_submission = intel_execlists_set_default_submission;