diff mbox series

[1/2] drm/i915/gvt: give the cmd parser decode_info a const treatment

Message ID 20190108141205.17860-1-jani.nikula@intel.com (mailing list archive)
State New, archived
Headers show
Series [1/2] drm/i915/gvt: give the cmd parser decode_info a const treatment | expand

Commit Message

Jani Nikula Jan. 8, 2019, 2:12 p.m. UTC
It doesn't need to be changed, make it const. The string literals should
anyway be referred to as const data.

The following gets moved to rodata section:

0000000000000410 l     O .rodata	0000000000000018 decode_info_mi
0000000000000390 l     O .rodata	0000000000000018 decode_info_3d_media
00000000000003e0 l     O .rodata	0000000000000018 decode_info_2d
0000000000000330 l     O .rodata	0000000000000018 decode_info_mfx_vc
00000000000002e0 l     O .rodata	0000000000000018 decode_info_vebox
0000000000000300 l     O .rodata	0000000000000028 sub_op_vebox
0000000000000360 l     O .rodata	0000000000000028 sub_op_mfx_vc
00000000000003c0 l     O .rodata	0000000000000020 sub_op_3d_media
0000000000000400 l     O .rodata	0000000000000010 sub_op_2d
0000000000000430 l     O .rodata	0000000000000010 sub_op_mi

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/gvt/cmd_parser.c | 30 +++++++++++++--------------
 1 file changed, 15 insertions(+), 15 deletions(-)

Comments

Yan Zhao Jan. 10, 2019, 2:51 a.m. UTC | #1
Looks good to me.
Reviewed-by: Yan Zhao <yan.y.zhao@intel.com>

> -----Original Message-----
> From: intel-gvt-dev [mailto:intel-gvt-dev-bounces@lists.freedesktop.org] On
> Behalf Of Jani Nikula
> Sent: Tuesday, January 8, 2019 10:12 PM
> To: intel-gvt-dev@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; intel-gfx@lists.freedesktop.org; Wang,
> Zhi A <zhi.a.wang@intel.com>; zhenyuw@linux.intel.com
> Subject: [PATCH 1/2] drm/i915/gvt: give the cmd parser decode_info a const
> treatment
> 
> It doesn't need to be changed, make it const. The string literals should anyway
> be referred to as const data.
> 
> The following gets moved to rodata section:
> 
> 0000000000000410 l     O .rodata	0000000000000018 decode_info_mi
> 0000000000000390 l     O .rodata	0000000000000018
> decode_info_3d_media
> 00000000000003e0 l     O .rodata	0000000000000018 decode_info_2d
> 0000000000000330 l     O .rodata	0000000000000018
> decode_info_mfx_vc
> 00000000000002e0 l     O .rodata	0000000000000018
> decode_info_vebox
> 0000000000000300 l     O .rodata	0000000000000028 sub_op_vebox
> 0000000000000360 l     O .rodata	0000000000000028 sub_op_mfx_vc
> 00000000000003c0 l     O .rodata	0000000000000020 sub_op_3d_media
> 0000000000000400 l     O .rodata	0000000000000010 sub_op_2d
> 0000000000000430 l     O .rodata	0000000000000010 sub_op_mi
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/cmd_parser.c | 30 +++++++++++++--------------
>  1 file changed, 15 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c
> b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> index 77ae634eb11c..98415d465a09 100644
> --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
> +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> @@ -55,10 +55,10 @@ struct sub_op_bits {
>  	int low;
>  };
>  struct decode_info {
> -	char *name;
> +	const char *name;
>  	int op_len;
>  	int nr_sub_op;
> -	struct sub_op_bits *sub_op;
> +	const struct sub_op_bits *sub_op;
>  };
> 
>  #define   MAX_CMD_BUDGET			0x7fffffff
> @@ -485,12 +485,12 @@ struct parser_exec_state {  static unsigned long
> bypass_scan_mask = 0;
> 
>  /* ring ALL, type = 0 */
> -static struct sub_op_bits sub_op_mi[] = {
> +static const struct sub_op_bits sub_op_mi[] = {
>  	{31, 29},
>  	{28, 23},
>  };
> 
> -static struct decode_info decode_info_mi = {
> +static const struct decode_info decode_info_mi = {
>  	"MI",
>  	OP_LEN_MI,
>  	ARRAY_SIZE(sub_op_mi),
> @@ -498,12 +498,12 @@ static struct decode_info decode_info_mi = {  };
> 
>  /* ring RCS, command type 2 */
> -static struct sub_op_bits sub_op_2d[] = {
> +static const struct sub_op_bits sub_op_2d[] = {
>  	{31, 29},
>  	{28, 22},
>  };
> 
> -static struct decode_info decode_info_2d = {
> +static const struct decode_info decode_info_2d = {
>  	"2D",
>  	OP_LEN_2D,
>  	ARRAY_SIZE(sub_op_2d),
> @@ -511,14 +511,14 @@ static struct decode_info decode_info_2d = {  };
> 
>  /* ring RCS, command type 3 */
> -static struct sub_op_bits sub_op_3d_media[] = {
> +static const struct sub_op_bits sub_op_3d_media[] = {
>  	{31, 29},
>  	{28, 27},
>  	{26, 24},
>  	{23, 16},
>  };
> 
> -static struct decode_info decode_info_3d_media = {
> +static const struct decode_info decode_info_3d_media = {
>  	"3D_Media",
>  	OP_LEN_3D_MEDIA,
>  	ARRAY_SIZE(sub_op_3d_media),
> @@ -526,7 +526,7 @@ static struct decode_info decode_info_3d_media = {  };
> 
>  /* ring VCS, command type 3 */
> -static struct sub_op_bits sub_op_mfx_vc[] = {
> +static const struct sub_op_bits sub_op_mfx_vc[] = {
>  	{31, 29},
>  	{28, 27},
>  	{26, 24},
> @@ -534,7 +534,7 @@ static struct sub_op_bits sub_op_mfx_vc[] = {
>  	{20, 16},
>  };
> 
> -static struct decode_info decode_info_mfx_vc = {
> +static const struct decode_info decode_info_mfx_vc = {
>  	"MFX_VC",
>  	OP_LEN_MFX_VC,
>  	ARRAY_SIZE(sub_op_mfx_vc),
> @@ -542,7 +542,7 @@ static struct decode_info decode_info_mfx_vc = {  };
> 
>  /* ring VECS, command type 3 */
> -static struct sub_op_bits sub_op_vebox[] = {
> +static const struct sub_op_bits sub_op_vebox[] = {
>  	{31, 29},
>  	{28, 27},
>  	{26, 24},
> @@ -550,14 +550,14 @@ static struct sub_op_bits sub_op_vebox[] = {
>  	{20, 16},
>  };
> 
> -static struct decode_info decode_info_vebox = {
> +static const struct decode_info decode_info_vebox = {
>  	"VEBOX",
>  	OP_LEN_VEBOX,
>  	ARRAY_SIZE(sub_op_vebox),
>  	sub_op_vebox,
>  };
> 
> -static struct decode_info *ring_decode_info[I915_NUM_ENGINES][8] = {
> +static const struct decode_info *ring_decode_info[I915_NUM_ENGINES][8]
> += {
>  	[RCS] = {
>  		&decode_info_mi,
>  		NULL,
> @@ -616,7 +616,7 @@ static struct decode_info
> *ring_decode_info[I915_NUM_ENGINES][8] = {
> 
>  static inline u32 get_opcode(u32 cmd, int ring_id)  {
> -	struct decode_info *d_info;
> +	const struct decode_info *d_info;
> 
>  	d_info = ring_decode_info[ring_id][CMD_TYPE(cmd)];
>  	if (d_info == NULL)
> @@ -657,7 +657,7 @@ static inline u32 sub_op_val(u32 cmd, u32 hi, u32 low)
> 
>  static inline void print_opcode(u32 cmd, int ring_id)  {
> -	struct decode_info *d_info;
> +	const struct decode_info *d_info;
>  	int i;
> 
>  	d_info = ring_decode_info[ring_id][CMD_TYPE(cmd)];
> --
> 2.20.1
> 
> _______________________________________________
> intel-gvt-dev mailing list
> intel-gvt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index 77ae634eb11c..98415d465a09 100644
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -55,10 +55,10 @@  struct sub_op_bits {
 	int low;
 };
 struct decode_info {
-	char *name;
+	const char *name;
 	int op_len;
 	int nr_sub_op;
-	struct sub_op_bits *sub_op;
+	const struct sub_op_bits *sub_op;
 };
 
 #define   MAX_CMD_BUDGET			0x7fffffff
@@ -485,12 +485,12 @@  struct parser_exec_state {
 static unsigned long bypass_scan_mask = 0;
 
 /* ring ALL, type = 0 */
-static struct sub_op_bits sub_op_mi[] = {
+static const struct sub_op_bits sub_op_mi[] = {
 	{31, 29},
 	{28, 23},
 };
 
-static struct decode_info decode_info_mi = {
+static const struct decode_info decode_info_mi = {
 	"MI",
 	OP_LEN_MI,
 	ARRAY_SIZE(sub_op_mi),
@@ -498,12 +498,12 @@  static struct decode_info decode_info_mi = {
 };
 
 /* ring RCS, command type 2 */
-static struct sub_op_bits sub_op_2d[] = {
+static const struct sub_op_bits sub_op_2d[] = {
 	{31, 29},
 	{28, 22},
 };
 
-static struct decode_info decode_info_2d = {
+static const struct decode_info decode_info_2d = {
 	"2D",
 	OP_LEN_2D,
 	ARRAY_SIZE(sub_op_2d),
@@ -511,14 +511,14 @@  static struct decode_info decode_info_2d = {
 };
 
 /* ring RCS, command type 3 */
-static struct sub_op_bits sub_op_3d_media[] = {
+static const struct sub_op_bits sub_op_3d_media[] = {
 	{31, 29},
 	{28, 27},
 	{26, 24},
 	{23, 16},
 };
 
-static struct decode_info decode_info_3d_media = {
+static const struct decode_info decode_info_3d_media = {
 	"3D_Media",
 	OP_LEN_3D_MEDIA,
 	ARRAY_SIZE(sub_op_3d_media),
@@ -526,7 +526,7 @@  static struct decode_info decode_info_3d_media = {
 };
 
 /* ring VCS, command type 3 */
-static struct sub_op_bits sub_op_mfx_vc[] = {
+static const struct sub_op_bits sub_op_mfx_vc[] = {
 	{31, 29},
 	{28, 27},
 	{26, 24},
@@ -534,7 +534,7 @@  static struct sub_op_bits sub_op_mfx_vc[] = {
 	{20, 16},
 };
 
-static struct decode_info decode_info_mfx_vc = {
+static const struct decode_info decode_info_mfx_vc = {
 	"MFX_VC",
 	OP_LEN_MFX_VC,
 	ARRAY_SIZE(sub_op_mfx_vc),
@@ -542,7 +542,7 @@  static struct decode_info decode_info_mfx_vc = {
 };
 
 /* ring VECS, command type 3 */
-static struct sub_op_bits sub_op_vebox[] = {
+static const struct sub_op_bits sub_op_vebox[] = {
 	{31, 29},
 	{28, 27},
 	{26, 24},
@@ -550,14 +550,14 @@  static struct sub_op_bits sub_op_vebox[] = {
 	{20, 16},
 };
 
-static struct decode_info decode_info_vebox = {
+static const struct decode_info decode_info_vebox = {
 	"VEBOX",
 	OP_LEN_VEBOX,
 	ARRAY_SIZE(sub_op_vebox),
 	sub_op_vebox,
 };
 
-static struct decode_info *ring_decode_info[I915_NUM_ENGINES][8] = {
+static const struct decode_info *ring_decode_info[I915_NUM_ENGINES][8] = {
 	[RCS] = {
 		&decode_info_mi,
 		NULL,
@@ -616,7 +616,7 @@  static struct decode_info *ring_decode_info[I915_NUM_ENGINES][8] = {
 
 static inline u32 get_opcode(u32 cmd, int ring_id)
 {
-	struct decode_info *d_info;
+	const struct decode_info *d_info;
 
 	d_info = ring_decode_info[ring_id][CMD_TYPE(cmd)];
 	if (d_info == NULL)
@@ -657,7 +657,7 @@  static inline u32 sub_op_val(u32 cmd, u32 hi, u32 low)
 
 static inline void print_opcode(u32 cmd, int ring_id)
 {
-	struct decode_info *d_info;
+	const struct decode_info *d_info;
 	int i;
 
 	d_info = ring_decode_info[ring_id][CMD_TYPE(cmd)];