From patchwork Thu Jan 31 23:55:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Matt Roper X-Patchwork-Id: 10791585 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 425F713B5 for ; Thu, 31 Jan 2019 23:56:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3AF492FE4B for ; Thu, 31 Jan 2019 23:56:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2D5CE30966; Thu, 31 Jan 2019 23:56:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CF9372FE4B for ; Thu, 31 Jan 2019 23:56:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4ED6B6E22D; Thu, 31 Jan 2019 23:56:24 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4AD166E22D for ; Thu, 31 Jan 2019 23:56:23 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 Jan 2019 15:56:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,546,1539673200"; d="scan'208";a="134906885" Received: from mdroper-desk.fm.intel.com ([10.105.128.126]) by orsmga001.jf.intel.com with ESMTP; 31 Jan 2019 15:56:22 -0800 From: Matt Roper To: intel-gfx@lists.freedesktop.org Date: Thu, 31 Jan 2019 15:55:08 -0800 Message-Id: <20190131235508.6970-4-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.14.5 In-Reply-To: <20190131235508.6970-1-matthew.d.roper@intel.com> References: <20190131235508.6970-1-matthew.d.roper@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v5 3/3] drm/i915: Add background color hardware readout and state check X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP We should support readout and verification of crtc background color as we do with other pipe state. Note that our hardware holds less bits of precision than the CRTC state allows, so we need to take care to only verify the most significant bits of the color after performing readout. At boot time the pipe color is already sanitized to full black as required by ABI, so the new readout here won't break that requirement. Suggested-by: Ville Syrjälä Cc: Ville Syrjälä Signed-off-by: Matt Roper Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 469480fe01a4..ecbfc8ce7b54 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9740,6 +9740,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum intel_display_power_domain power_domain; u64 power_domain_mask; + u32 bgcolor; bool active; intel_crtc_init_scalers(crtc, pipe_config); @@ -9806,6 +9807,15 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, pipe_config->pixel_multiplier = 1; } + if (INTEL_GEN(dev_priv) >= 9) { + bgcolor = I915_READ(SKL_BOTTOM_COLOR(crtc->pipe)); + pipe_config->base.bgcolor = + drm_argb(10, 0xFFFF, + bgcolor >> 20 & 0x3FF, + bgcolor >> 10 & 0x3FF, + bgcolor & 0x3FF); + } + out: for_each_power_domain(power_domain, power_domain_mask) intel_display_power_put_unchecked(dev_priv, power_domain); @@ -11422,6 +11432,10 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc, drm_rect_width(&state->base.dst), drm_rect_height(&state->base.dst)); } + + if (INTEL_GEN(dev_priv) >= 9) + DRM_DEBUG_KMS("background color: %llx\n", + pipe_config->base.bgcolor); } static bool check_digital_port_conflicts(struct drm_atomic_state *state) @@ -11784,6 +11798,16 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv, } \ } while (0) +#define PIPE_CONF_CHECK_LLX_MASKED(name, mask) do { \ + if ((current_config->name & mask) != (pipe_config->name & mask)) { \ + pipe_config_err(adjust, __stringify(name), \ + "(expected 0x%016llx, found 0x%016llx)\n", \ + current_config->name & mask, \ + pipe_config->name & mask); \ + ret = false; \ + } \ +} while (0) + #define PIPE_CONF_CHECK_I(name) do { \ if (current_config->name != pipe_config->name) { \ pipe_config_err(adjust, __stringify(name), \ @@ -12035,6 +12059,14 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv, PIPE_CONF_CHECK_I(min_voltage_level); + /* + * Hardware only holds top 10 bits of each color component; ignore + * bottom six bits (and all of alpha) when comparing against readout. + */ + if (INTEL_GEN(dev_priv) >= 9) + PIPE_CONF_CHECK_LLX_MASKED(base.bgcolor, 0x0000FFC0FFC0FFC0); + +#undef PIPE_CONF_CHECK_LLX_MASKED #undef PIPE_CONF_CHECK_X #undef PIPE_CONF_CHECK_I #undef PIPE_CONF_CHECK_BOOL