drm/i915: Dump skl+ watermark changes

Message ID	20190208200527.12844-1-ville.syrjala@linux.intel.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <intel-gfx-bounces@lists.freedesktop.org> From: Ville Syrjala <ville.syrjala@linux.intel.com> To: intel-gfx@lists.freedesktop.org Date: Fri, 8 Feb 2019 22:05:27 +0200 Message-Id: <20190208200527.12844-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915: Dump skl+ watermark changes Precedence: list Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
Series	drm/i915: Dump skl+ watermark changes \| expand drm/i915: Dump skl+ watermark changes

Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> -Clint On 2/8/19 12:05, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Currently we're only dumping out the ddb allocation changes, let's do > the same for the watermarks. This should help with debugging underruns > and whatnot. > > First I tried one line per plane per wm level, but that resulted in > an obnoxious amount of lines printed. So as a compromise I settled > on a four line format, each line containing a single watermark related > value (enable,lines,blocks,min_ddb_alloc) for all 8 levels (+trans wm). > It still produces quite a lot of output but I can't really see a way > around that because we simply have a lot of data to dump. > > Let's also pimp the ddb debug to print the size of the allocations > too, not just their bounds. Makes it a bit easier to compare against > the watermarks. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 86 +++++++++++++++++++++++++++++++-- > 1 file changed, 83 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 54307f1df6cf..454581b044ad 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -5269,6 +5269,11 @@ skl_compute_ddb(struct intel_atomic_state *state) > return 0; > } > > +static char enast(bool enable) > +{ > + return enable ? '*' : ' '; > +} > + > static void > skl_print_wm_changes(struct intel_atomic_state *state) > { > @@ -5279,8 +5284,16 @@ skl_print_wm_changes(struct intel_atomic_state *state) > struct intel_crtc *crtc; > int i; > > + if ((drm_debug & DRM_UT_KMS) == 0) > + return; > + > for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, > new_crtc_state, i) { > + const struct skl_pipe_wm *old_pipe_wm, *new_pipe_wm; > + > + old_pipe_wm = &old_crtc_state->wm.skl.optimal; > + new_pipe_wm = &new_crtc_state->wm.skl.optimal; > + > for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { > enum plane_id plane_id = plane->id; > const struct skl_ddb_entry *old, *new; > @@ -5291,10 +5304,77 @@ skl_print_wm_changes(struct intel_atomic_state *state) > if (skl_ddb_entry_equal(old, new)) > continue; > > - DRM_DEBUG_KMS("[PLANE:%d:%s] ddb (%d - %d) -> (%d - %d)\n", > + DRM_DEBUG_KMS("[PLANE:%d:%s] ddb (%4d - %4d) -> (%4d - %4d), size %4d -> %4d\n", > + plane->base.base.id, plane->base.name, > + old->start, old->end, new->start, new->end, > + skl_ddb_entry_size(old), skl_ddb_entry_size(new)); > + } > + > + for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { > + enum plane_id plane_id = plane->id; > + const struct skl_plane_wm *old_wm, *new_wm; > + > + old_wm = &old_pipe_wm->planes[plane_id]; > + new_wm = &new_pipe_wm->planes[plane_id]; > + > + if (skl_plane_wm_equals(dev_priv, old_wm, new_wm)) > + continue; > + > + DRM_DEBUG_KMS("[PLANE:%d:%s] level %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm" > + " -> %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm\n", > + plane->base.base.id, plane->base.name, > + enast(old_wm->wm[0].plane_en), enast(old_wm->wm[1].plane_en), > + enast(old_wm->wm[2].plane_en), enast(old_wm->wm[3].plane_en), > + enast(old_wm->wm[4].plane_en), enast(old_wm->wm[5].plane_en), > + enast(old_wm->wm[6].plane_en), enast(old_wm->wm[7].plane_en), > + enast(old_wm->trans_wm.plane_en), > + enast(new_wm->wm[0].plane_en), enast(new_wm->wm[1].plane_en), > + enast(new_wm->wm[2].plane_en), enast(new_wm->wm[3].plane_en), > + enast(new_wm->wm[4].plane_en), enast(new_wm->wm[5].plane_en), > + enast(new_wm->wm[6].plane_en), enast(new_wm->wm[7].plane_en), > + enast(new_wm->trans_wm.plane_en)); > + > + DRM_DEBUG_KMS("[PLANE:%d:%s] lines %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" > + " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", > + plane->base.base.id, plane->base.name, > + old_wm->wm[0].plane_res_l, old_wm->wm[1].plane_res_l, > + old_wm->wm[2].plane_res_l, old_wm->wm[3].plane_res_l, > + old_wm->wm[4].plane_res_l, old_wm->wm[5].plane_res_l, > + old_wm->wm[6].plane_res_l, old_wm->wm[7].plane_res_l, > + old_wm->trans_wm.plane_res_l, > + new_wm->wm[0].plane_res_l, new_wm->wm[1].plane_res_l, > + new_wm->wm[2].plane_res_l, new_wm->wm[3].plane_res_l, > + new_wm->wm[4].plane_res_l, new_wm->wm[5].plane_res_l, > + new_wm->wm[6].plane_res_l, new_wm->wm[7].plane_res_l, > + new_wm->trans_wm.plane_res_l); > + > + DRM_DEBUG_KMS("[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" > + " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", > + plane->base.base.id, plane->base.name, > + old_wm->wm[0].plane_res_b, old_wm->wm[1].plane_res_b, > + old_wm->wm[2].plane_res_b, old_wm->wm[3].plane_res_b, > + old_wm->wm[4].plane_res_b, old_wm->wm[5].plane_res_b, > + old_wm->wm[6].plane_res_b, old_wm->wm[7].plane_res_b, > + old_wm->trans_wm.plane_res_b, > + new_wm->wm[0].plane_res_b, new_wm->wm[1].plane_res_b, > + new_wm->wm[2].plane_res_b, new_wm->wm[3].plane_res_b, > + new_wm->wm[4].plane_res_b, new_wm->wm[5].plane_res_b, > + new_wm->wm[6].plane_res_b, new_wm->wm[7].plane_res_b, > + new_wm->trans_wm.plane_res_b); > + > + DRM_DEBUG_KMS("[PLANE:%d:%s] min_ddb %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" > + " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", > plane->base.base.id, plane->base.name, > - old->start, old->end, > - new->start, new->end); > + old_wm->wm[0].min_ddb_alloc, old_wm->wm[1].min_ddb_alloc, > + old_wm->wm[2].min_ddb_alloc, old_wm->wm[3].min_ddb_alloc, > + old_wm->wm[4].min_ddb_alloc, old_wm->wm[5].min_ddb_alloc, > + old_wm->wm[6].min_ddb_alloc, old_wm->wm[7].min_ddb_alloc, > + old_wm->trans_wm.min_ddb_alloc, > + new_wm->wm[0].min_ddb_alloc, new_wm->wm[1].min_ddb_alloc, > + new_wm->wm[2].min_ddb_alloc, new_wm->wm[3].min_ddb_alloc, > + new_wm->wm[4].min_ddb_alloc, new_wm->wm[5].min_ddb_alloc, > + new_wm->wm[6].min_ddb_alloc, new_wm->wm[7].min_ddb_alloc, > + new_wm->trans_wm.min_ddb_alloc); > } > } > } <html> <head> <meta http-equiv="Content-Type" content="text/html; charset=UTF-8"> </head> <body text="#000000" bgcolor="#FFFFFF"> <p><font size="-1">Reviewed-by: Clint Taylor <a class="moz-txt-link-rfc2396E" href="mailto:Clinton.A.Taylor@intel.com"><Clinton.A.Taylor@intel.com></a> </font><br> </p> <div class="moz-cite-prefix">-Clint</div> <div class="moz-cite-prefix"><br> </div> <div class="moz-cite-prefix"><br> </div> <div class="moz-cite-prefix"><br> </div> <div class="moz-cite-prefix">On 2/8/19 12:05, Ville Syrjala wrote:<br> </div> <blockquote type="cite" cite="mid:20190208200527.12844-1-ville.syrjala@linux.intel.com"> <pre class="moz-quote-pre" wrap="">From: Ville Syrjälä <a class="moz-txt-link-rfc2396E" href="mailto:ville.syrjala@linux.intel.com"><ville.syrjala@linux.intel.com></a> Currently we're only dumping out the ddb allocation changes, let's do the same for the watermarks. This should help with debugging underruns and whatnot. First I tried one line per plane per wm level, but that resulted in an obnoxious amount of lines printed. So as a compromise I settled on a four line format, each line containing a single watermark related value (enable,lines,blocks,min_ddb_alloc) for all 8 levels (+trans wm). It still produces quite a lot of output but I can't really see a way around that because we simply have a lot of data to dump. Let's also pimp the ddb debug to print the size of the allocations too, not just their bounds. Makes it a bit easier to compare against the watermarks. Signed-off-by: Ville Syrjälä <a class="moz-txt-link-rfc2396E" href="mailto:ville.syrjala@linux.intel.com"><ville.syrjala@linux.intel.com></a> --- drivers/gpu/drm/i915/intel_pm.c | 86 +++++++++++++++++++++++++++++++-- 1 file changed, 83 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 54307f1df6cf..454581b044ad 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5269,6 +5269,11 @@ skl_compute_ddb(struct intel_atomic_state *state) return 0; } +static char enast(bool enable) +{ + return enable ? '*' : ' '; +} + static void skl_print_wm_changes(struct intel_atomic_state *state) { @@ -5279,8 +5284,16 @@ skl_print_wm_changes(struct intel_atomic_state *state) struct intel_crtc *crtc; int i; + if ((drm_debug & DRM_UT_KMS) == 0) + return; + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { + const struct skl_pipe_wm *old_pipe_wm, *new_pipe_wm; + + old_pipe_wm = &old_crtc_state->wm.skl.optimal; + new_pipe_wm = &new_crtc_state->wm.skl.optimal; + for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { enum plane_id plane_id = plane->id; const struct skl_ddb_entry *old, *new; @@ -5291,10 +5304,77 @@ skl_print_wm_changes(struct intel_atomic_state *state) if (skl_ddb_entry_equal(old, new)) continue; - DRM_DEBUG_KMS("[PLANE:%d:%s] ddb (%d - %d) -> (%d - %d)\n", + DRM_DEBUG_KMS("[PLANE:%d:%s] ddb (%4d - %4d) -> (%4d - %4d), size %4d -> %4d\n", + plane->base.base.id, plane->base.name, + old->start, old->end, new->start, new->end, + skl_ddb_entry_size(old), skl_ddb_entry_size(new)); + } + + for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { + enum plane_id plane_id = plane->id; + const struct skl_plane_wm *old_wm, *new_wm; + + old_wm = &old_pipe_wm->planes[plane_id]; + new_wm = &new_pipe_wm->planes[plane_id]; + + if (skl_plane_wm_equals(dev_priv, old_wm, new_wm)) + continue; + + DRM_DEBUG_KMS("[PLANE:%d:%s] level %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm" + " -> %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm\n", + plane->base.base.id, plane->base.name, + enast(old_wm->wm[0].plane_en), enast(old_wm->wm[1].plane_en), + enast(old_wm->wm[2].plane_en), enast(old_wm->wm[3].plane_en), + enast(old_wm->wm[4].plane_en), enast(old_wm->wm[5].plane_en), + enast(old_wm->wm[6].plane_en), enast(old_wm->wm[7].plane_en), + enast(old_wm->trans_wm.plane_en), + enast(new_wm->wm[0].plane_en), enast(new_wm->wm[1].plane_en), + enast(new_wm->wm[2].plane_en), enast(new_wm->wm[3].plane_en), + enast(new_wm->wm[4].plane_en), enast(new_wm->wm[5].plane_en), + enast(new_wm->wm[6].plane_en), enast(new_wm->wm[7].plane_en), + enast(new_wm->trans_wm.plane_en)); + + DRM_DEBUG_KMS("[PLANE:%d:%s] lines %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" + " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", + plane->base.base.id, plane->base.name, + old_wm->wm[0].plane_res_l, old_wm->wm[1].plane_res_l, + old_wm->wm[2].plane_res_l, old_wm->wm[3].plane_res_l, + old_wm->wm[4].plane_res_l, old_wm->wm[5].plane_res_l, + old_wm->wm[6].plane_res_l, old_wm->wm[7].plane_res_l, + old_wm->trans_wm.plane_res_l, + new_wm->wm[0].plane_res_l, new_wm->wm[1].plane_res_l, + new_wm->wm[2].plane_res_l, new_wm->wm[3].plane_res_l, + new_wm->wm[4].plane_res_l, new_wm->wm[5].plane_res_l, + new_wm->wm[6].plane_res_l, new_wm->wm[7].plane_res_l, + new_wm->trans_wm.plane_res_l); + + DRM_DEBUG_KMS("[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" + " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", + plane->base.base.id, plane->base.name, + old_wm->wm[0].plane_res_b, old_wm->wm[1].plane_res_b, + old_wm->wm[2].plane_res_b, old_wm->wm[3].plane_res_b, + old_wm->wm[4].plane_res_b, old_wm->wm[5].plane_res_b, + old_wm->wm[6].plane_res_b, old_wm->wm[7].plane_res_b, + old_wm->trans_wm.plane_res_b, + new_wm->wm[0].plane_res_b, new_wm->wm[1].plane_res_b, + new_wm->wm[2].plane_res_b, new_wm->wm[3].plane_res_b, + new_wm->wm[4].plane_res_b, new_wm->wm[5].plane_res_b, + new_wm->wm[6].plane_res_b, new_wm->wm[7].plane_res_b, + new_wm->trans_wm.plane_res_b); + + DRM_DEBUG_KMS("[PLANE:%d:%s] min_ddb %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d" + " -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d\n", plane->base.base.id, plane->base.name, - old->start, old->end, - new->start, new->end); + old_wm->wm[0].min_ddb_alloc, old_wm->wm[1].min_ddb_alloc, + old_wm->wm[2].min_ddb_alloc, old_wm->wm[3].min_ddb_alloc, + old_wm->wm[4].min_ddb_alloc, old_wm->wm[5].min_ddb_alloc, + old_wm->wm[6].min_ddb_alloc, old_wm->wm[7].min_ddb_alloc, + old_wm->trans_wm.min_ddb_alloc, + new_wm->wm[0].min_ddb_alloc, new_wm->wm[1].min_ddb_alloc, + new_wm->wm[2].min_ddb_alloc, new_wm->wm[3].min_ddb_alloc, + new_wm->wm[4].min_ddb_alloc, new_wm->wm[5].min_ddb_alloc, + new_wm->wm[6].min_ddb_alloc, new_wm->wm[7].min_ddb_alloc, + new_wm->trans_wm.min_ddb_alloc); } } } </pre> </blockquote> </body> </html>

drm/i915: Dump skl+ watermark changes

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