diff mbox series

drm/i915/pmu: Use GT parked for estimating RC6 while asleep

Message ID 20190212223946.26195-1-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show
Series drm/i915/pmu: Use GT parked for estimating RC6 while asleep | expand

Commit Message

Chris Wilson Feb. 12, 2019, 10:39 p.m. UTC
As we track when we put the GT device to sleep upon idling, we can use
that callback to sample the current rc6 counters and record the
timestamp for estimating samples after that point while asleep.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_pmu.c | 83 ++++++++++++++++++++-------------
 drivers/gpu/drm/i915/i915_pmu.h |  4 +-
 2 files changed, 52 insertions(+), 35 deletions(-)

Comments

Chris Wilson Feb. 12, 2019, 11:08 p.m. UTC | #1
Quoting Chris Wilson (2019-02-12 22:39:46)
> As we track when we put the GT device to sleep upon idling, we can use
> that callback to sample the current rc6 counters and record the
> timestamp for estimating samples after that point while asleep.

Bah, the perf_pmu/rc6 test bypasses the GPU and pokes the forcewake bit
instead. This needs

@@ -1495,9 +1496,11 @@ test_rc6(int gem_fd, unsigned int flags)
        igt_assert(fw >= 0);
        usleep(1e3); /* wait for the rc6 cycle counter to stop ticking */

+       spin = igt_spin_batch_new(gem_fd, .engine = I915_EXEC_RENDER);
        prev = pmu_read_single(fd);
        usleep(duration_ns / 1000);
        busy = pmu_read_single(fd);
+       igt_spin_batch_end(spin);

to paper over the difference.
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 13d70b90dd0f..bb6b66624e64 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -110,17 +110,49 @@  static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
 	return enable;
 }
 
+static u64 __get_rc6(struct drm_i915_private *i915)
+{
+	u64 val;
+
+	val = intel_rc6_residency_ns(i915,
+				     IS_VALLEYVIEW(i915) ?
+				     VLV_GT_RENDER_RC6 :
+				     GEN6_GT_GFX_RC6);
+
+	if (HAS_RC6p(i915))
+		val += intel_rc6_residency_ns(i915, GEN6_GT_GFX_RC6p);
+
+	if (HAS_RC6pp(i915))
+		val += intel_rc6_residency_ns(i915, GEN6_GT_GFX_RC6pp);
+
+	return val;
+}
+
 void i915_pmu_gt_parked(struct drm_i915_private *i915)
 {
+	u64 val;
+
 	if (!i915->pmu.base.event_init)
 		return;
 
+	val = 0;
+	if (i915->pmu.sample[__I915_SAMPLE_RC6].cur)
+		val = __get_rc6(i915);
+
 	spin_lock_irq(&i915->pmu.lock);
+
+	if (val >= i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur) {
+		i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur = 0;
+		i915->pmu.sample[__I915_SAMPLE_RC6].cur = val;
+	}
+	i915->pmu.sleep_timestamp = jiffies;
+
 	/*
 	 * Signal sampling timer to stop if only engine events are enabled and
 	 * GPU went idle.
 	 */
 	i915->pmu.timer_enabled = pmu_needs_timer(i915, false);
+
 	spin_unlock_irq(&i915->pmu.lock);
 }
 
@@ -141,10 +173,23 @@  void i915_pmu_gt_unparked(struct drm_i915_private *i915)
 		return;
 
 	spin_lock_irq(&i915->pmu.lock);
+
 	/*
 	 * Re-enable sampling timer when GPU goes active.
 	 */
 	__i915_pmu_maybe_start_timer(i915);
+
+	/* Estimate how long we slept and accumulate that into rc6 counters */
+	if (i915->pmu.sample[__I915_SAMPLE_RC6].cur) {
+		u64 val;
+
+		val = jiffies - i915->pmu.sleep_timestamp;
+		val = jiffies_to_nsecs(val);
+		val += i915->pmu.sample[__I915_SAMPLE_RC6].cur;
+
+		i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur = val;
+	}
+
 	spin_unlock_irq(&i915->pmu.lock);
 }
 
@@ -425,24 +470,6 @@  static int i915_pmu_event_init(struct perf_event *event)
 	return 0;
 }
 
-static u64 __get_rc6(struct drm_i915_private *i915)
-{
-	u64 val;
-
-	val = intel_rc6_residency_ns(i915,
-				     IS_VALLEYVIEW(i915) ?
-				     VLV_GT_RENDER_RC6 :
-				     GEN6_GT_GFX_RC6);
-
-	if (HAS_RC6p(i915))
-		val += intel_rc6_residency_ns(i915, GEN6_GT_GFX_RC6p);
-
-	if (HAS_RC6pp(i915))
-		val += intel_rc6_residency_ns(i915, GEN6_GT_GFX_RC6pp);
-
-	return val;
-}
-
 static u64 get_rc6(struct drm_i915_private *i915)
 {
 #if IS_ENABLED(CONFIG_PM)
@@ -450,7 +477,9 @@  static u64 get_rc6(struct drm_i915_private *i915)
 	unsigned long flags;
 	u64 val;
 
-	wakeref = intel_runtime_pm_get_if_in_use(i915);
+	wakeref = 0;
+	if (READ_ONCE(i915->gt.awake))
+		wakeref = intel_runtime_pm_get_if_in_use(i915);
 	if (wakeref) {
 		val = __get_rc6(i915);
 		intel_runtime_pm_put(i915, wakeref);
@@ -472,9 +501,6 @@  static u64 get_rc6(struct drm_i915_private *i915)
 
 		spin_unlock_irqrestore(&i915->pmu.lock, flags);
 	} else {
-		struct pci_dev *pdev = i915->drm.pdev;
-		struct device *kdev = &pdev->dev;
-
 		/*
 		 * We are runtime suspended.
 		 *
@@ -483,7 +509,6 @@  static u64 get_rc6(struct drm_i915_private *i915)
 		 * counter value.
 		 */
 		spin_lock_irqsave(&i915->pmu.lock, flags);
-		spin_lock(&kdev->power.lock);
 
 		/*
 		 * After the above branch intel_runtime_pm_get_if_in_use failed
@@ -496,15 +521,8 @@  static u64 get_rc6(struct drm_i915_private *i915)
 		 * suspended and if not we cannot do better than report the last
 		 * known RC6 value.
 		 */
-		if (kdev->power.runtime_status == RPM_SUSPENDED) {
-			if (!i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur)
-				i915->pmu.suspended_jiffies_last =
-						  kdev->power.suspended_jiffies;
-
-			val = kdev->power.suspended_jiffies -
-			      i915->pmu.suspended_jiffies_last;
-			val += jiffies - kdev->power.accounting_timestamp;
-
+		if (!READ_ONCE(i915->gt.awake)) {
+			val = jiffies - i915->pmu.sleep_timestamp;
 			val = jiffies_to_nsecs(val);
 			val += i915->pmu.sample[__I915_SAMPLE_RC6].cur;
 
@@ -515,7 +533,6 @@  static u64 get_rc6(struct drm_i915_private *i915)
 			val = i915->pmu.sample[__I915_SAMPLE_RC6].cur;
 		}
 
-		spin_unlock(&kdev->power.lock);
 		spin_unlock_irqrestore(&i915->pmu.lock, flags);
 	}
 
diff --git a/drivers/gpu/drm/i915/i915_pmu.h b/drivers/gpu/drm/i915/i915_pmu.h
index b3728c5f13e7..6fa0240a1704 100644
--- a/drivers/gpu/drm/i915/i915_pmu.h
+++ b/drivers/gpu/drm/i915/i915_pmu.h
@@ -97,9 +97,9 @@  struct i915_pmu {
 	 */
 	struct i915_pmu_sample sample[__I915_NUM_PMU_SAMPLERS];
 	/**
-	 * @suspended_jiffies_last: Cached suspend time from PM core.
+	 * @sleep_timestamp: Last time GT parked for RC6 estimation.
 	 */
-	unsigned long suspended_jiffies_last;
+	unsigned long sleep_timestamp;
 	/**
 	 * @i915_attr: Memory block holding device attributes.
 	 */