@@ -431,7 +431,8 @@ static const struct intel_device_info intel_haswell_gt3_info = {
GEN(8), \
BDW_COLORS, \
.page_sizes = I915_GTT_PAGE_SIZE_4K | \
- I915_GTT_PAGE_SIZE_2M, \
+ I915_GTT_PAGE_SIZE_2M | \
+ I915_GTT_PAGE_SIZE_1G, \
.has_logical_ring_contexts = 1, \
.ppgtt = INTEL_PPGTT_FULL_4LVL, \
.has_64bit_reloc = 1, \
@@ -491,7 +492,8 @@ static const struct intel_device_info intel_cherryview_info = {
#define GEN9_DEFAULT_PAGE_SIZES \
.page_sizes = I915_GTT_PAGE_SIZE_4K | \
I915_GTT_PAGE_SIZE_64K | \
- I915_GTT_PAGE_SIZE_2M
+ I915_GTT_PAGE_SIZE_2M | \
+ I915_GTT_PAGE_SIZE_1G
#define GEN9_FEATURES \
GEN8_FEATURES, \
@@ -182,7 +182,8 @@ struct drm_i915_private *mock_gem_device(void)
mkwrite_device_info(i915)->page_sizes =
I915_GTT_PAGE_SIZE_4K |
I915_GTT_PAGE_SIZE_64K |
- I915_GTT_PAGE_SIZE_2M;
+ I915_GTT_PAGE_SIZE_2M |
+ I915_GTT_PAGE_SIZE_1G;
mock_uncore_init(i915);
i915_gem_init__mm(i915);
For gen8+ platforms which support the 48b PPGTT, enable support for 1G pages. Also enable for mock testing. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 6 ++++-- drivers/gpu/drm/i915/selftests/mock_gem_device.c | 3 ++- 2 files changed, 6 insertions(+), 3 deletions(-)