From patchwork Fri Feb 15 23:35:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Matt Roper X-Patchwork-Id: 10816097 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 110F4139A for ; Fri, 15 Feb 2019 23:36:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F3F0B2F6C5 for ; Fri, 15 Feb 2019 23:36:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E66363001C; Fri, 15 Feb 2019 23:36:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7DC802F6C5 for ; Fri, 15 Feb 2019 23:36:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 489216EC2F; Fri, 15 Feb 2019 23:36:36 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id C8AAC6EC2F for ; Fri, 15 Feb 2019 23:36:34 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Feb 2019 15:36:34 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,374,1544515200"; d="scan'208";a="320814965" Received: from mdroper-desk.fm.intel.com ([10.105.128.126]) by fmsmga005.fm.intel.com with ESMTP; 15 Feb 2019 15:36:34 -0800 From: Matt Roper To: intel-gfx@lists.freedesktop.org Date: Fri, 15 Feb 2019 15:35:41 -0800 Message-Id: <20190215233541.16445-1-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.14.5 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915/icl: Fix checks for userspace ctm + ycbcr output X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP We recently added support for gen11's new "output csc" which can be used independently of the regular pipe CSC. The idea is that this new output csc allows us to use a userspace-provided color transformation matrix at the same time we drive a YCBCR display mode requiring RGB->YUV conversion. However when landing that support we only updated the color management code and overlooked that there was an additional atomic check in the modeset path (in intel_crtc_compute_config()) that still assumes we only have a single CSC unit to work with. Let's update that check to only apply to pre-gen11 platforms and move it into the color management code to ensure it gets called on all commits, not just modesets. Also, if we're *only* using the output CSC and not the pipe CSC, there's no need to set crtc_state->csc_enable, so let's also not consider the output format when setting csc_enable on gen11+ platforms. Fixes: a91de580541c ("drm/i915/icl: Enable pipe output csc") Cc: Uma Shankar Cc: Maarten Lankhorst Cc: Ville Syrjälä Signed-off-by: Matt Roper Reviewed-by: Uma Shankar --- It might also be worth moving the full->limited range RGB conversion from the pipe CSC to the output CSC on gen11 at some point. drivers/gpu/drm/i915/intel_color.c | 16 +++++++++++++--- drivers/gpu/drm/i915/intel_display.c | 12 ------------ 2 files changed, 13 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c index da7a07d5ccea..b47e6d1aaaec 100644 --- a/drivers/gpu/drm/i915/intel_color.c +++ b/drivers/gpu/drm/i915/intel_color.c @@ -780,9 +780,10 @@ int intel_color_check(struct intel_crtc_state *crtc_state) IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) limited_color_range = crtc_state->limited_color_range; - crtc_state->csc_enable = - crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB || - crtc_state->base.ctm || limited_color_range; + crtc_state->csc_enable = crtc_state->base.ctm || limited_color_range; + if (INTEL_GEN(dev_priv) < 11) + crtc_state->csc_enable |= + crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB; ret = intel_color_add_affected_planes(crtc_state); if (ret) @@ -822,6 +823,15 @@ int intel_color_check(struct intel_crtc_state *crtc_state) crtc_state->csc_mode |= ICL_OUTPUT_CSC_ENABLE; crtc_state->csc_mode |= ICL_CSC_ENABLE; + } else if (crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB && + crtc_state->base.ctm) { + /* + * There is only one pipe CSC unit per pipe on pre-gen11, and + * we need that for output conversion from RGB->YCBCR. So if + * CTM is already applied we can't support YCBCR output. + */ + DRM_DEBUG_KMS("YCBCR420 and CTM together are not possible\n"); + return -EINVAL; } return 0; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index afa21daaae51..81bfdbd99092 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6855,18 +6855,6 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc, return -EINVAL; } - if ((pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 || - pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) && - pipe_config->base.ctm) { - /* - * There is only one pipe CSC unit per pipe, and we need that - * for output conversion from RGB->YCBCR. So if CTM is already - * applied we can't support YCBCR420 output. - */ - DRM_DEBUG_KMS("YCBCR420 and CTM together are not possible\n"); - return -EINVAL; - } - /* * Pipe horizontal size must be even in: * - DVO ganged mode