| Message ID | 20190227155109.30993-2-michal.winiarski@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] drm/i915/icl: Default to Thread Group preemption for compute workloads | expand |
Quoting Michał Winiarski (2019-02-27 15:51:09) > There are still some cases where userspace needs to change the > preemption granularity for compute workloads. Let's whitelist the > per-ctx granularity control register to allow it. Just wondering aloud if this should a single patch; change the default and allow userspace to opt-in in a single switch. -Chris
Quoting Michał Winiarski (2019-02-27 15:51:09) > There are still some cases where userspace needs to change the > preemption granularity for compute workloads. Let's whitelist the > per-ctx granularity control register to allow it. > > Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> > Cc: Anuj Phogat <anuj.phogat@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> > Cc: Rafael Antognolli <rafael.antognolli@intel.com> > --- > drivers/gpu/drm/i915/intel_workarounds.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c > index a19e1c0052a7..1aa167415096 100644 > --- a/drivers/gpu/drm/i915/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/intel_workarounds.c > @@ -1057,6 +1057,9 @@ static void icl_whitelist_build(struct i915_wa_list *w) > > /* WaAllowUMDToModifySamplerMode:icl */ > whitelist_reg(w, GEN10_SAMPLER_MODE); > + > + /* WaEnablePreemptionGranularityControlByUMD:icl */ > + whitelist_reg(w, GEN8_CS_CHICKEN1); Whilst you are here, I have a task to add a quick little test to check to make sure that "userspace" can actually write to the whitelisted register. Or at least review the selftest and fill in a few gaps. -Chris
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index a19e1c0052a7..1aa167415096 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -1057,6 +1057,9 @@ static void icl_whitelist_build(struct i915_wa_list *w) /* WaAllowUMDToModifySamplerMode:icl */ whitelist_reg(w, GEN10_SAMPLER_MODE); + + /* WaEnablePreemptionGranularityControlByUMD:icl */ + whitelist_reg(w, GEN8_CS_CHICKEN1); } void intel_engine_init_whitelist(struct intel_engine_cs *engine)
There are still some cases where userspace needs to change the preemption granularity for compute workloads. Let's whitelist the per-ctx granularity control register to allow it. Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Cc: Anuj Phogat <anuj.phogat@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Rafael Antognolli <rafael.antognolli@intel.com> --- drivers/gpu/drm/i915/intel_workarounds.c | 3 +++ 1 file changed, 3 insertions(+)