| Message ID | 20190305124827.23446-2-michal.winiarski@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] drm/i915/icl: Default to Thread Group preemption for compute workloads | expand |
On Tue, Mar 05, 2019 at 01:48:27PM +0100, Michał Winiarski wrote: > There are still some cases where userspace needs to change the > preemption granularity for compute workloads. Let's whitelist the > per-ctx granularity control register to allow it. We are not planning to enable it just yet but would be good to easily enable it in the future. Acked-by: Rafael Antognolli <rafael.antognolli@intel.com> > Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> > Cc: Anuj Phogat <anuj.phogat@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> > Cc: Rafael Antognolli <rafael.antognolli@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > --- > drivers/gpu/drm/i915/intel_workarounds.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c > index 2fba33509f4e..582f554e53f4 100644 > --- a/drivers/gpu/drm/i915/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/intel_workarounds.c > @@ -1053,6 +1053,9 @@ static void icl_whitelist_build(struct i915_wa_list *w) > > /* WaAllowUMDToModifySamplerMode:icl */ > whitelist_reg(w, GEN10_SAMPLER_MODE); > + > + /* WaEnablePreemptionGranularityControlByUMD:icl */ > + whitelist_reg(w, GEN8_CS_CHICKEN1); > } > > void intel_engine_init_whitelist(struct intel_engine_cs *engine) > -- > 2.20.1 >
Quoting Michał Winiarski (2019-03-05 12:48:27) > There are still some cases where userspace needs to change the > preemption granularity for compute workloads. Let's whitelist the > per-ctx granularity control register to allow it. > > Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> > Cc: Anuj Phogat <anuj.phogat@intel.com> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> > Cc: Rafael Antognolli <rafael.antognolli@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> Trusting that since it was context saved on earlier gen, it remains so. (One more selftest to write.) Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index 2fba33509f4e..582f554e53f4 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -1053,6 +1053,9 @@ static void icl_whitelist_build(struct i915_wa_list *w) /* WaAllowUMDToModifySamplerMode:icl */ whitelist_reg(w, GEN10_SAMPLER_MODE); + + /* WaEnablePreemptionGranularityControlByUMD:icl */ + whitelist_reg(w, GEN8_CS_CHICKEN1); } void intel_engine_init_whitelist(struct intel_engine_cs *engine)
There are still some cases where userspace needs to change the preemption granularity for compute workloads. Let's whitelist the per-ctx granularity control register to allow it. Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> Cc: Anuj Phogat <anuj.phogat@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Rafael Antognolli <rafael.antognolli@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/intel_workarounds.c | 3 +++ 1 file changed, 3 insertions(+)