| Message ID | 20190305233058.29861-3-jose.souza@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/3] drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time | expand |
Hi José,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v5.0 next-20190305]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Jos-Roberto-de-Souza/drm-i915-vbt-Parse-and-use-the-new-field-with-PSR2-TP2-3-wakeup-time/20190306-140524
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-x006-201909 (attached as .config)
compiler: gcc-8 (Debian 8.3.0-2) 8.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/intel_psr.c: In function 'psr1_tps_regs_val_get':
>> drivers/gpu/drm/i915/intel_psr.c:446:2: error: expected ';' before 'if'
if (dev_priv->vbt.psr.tp1_wakeup_time_us == 0)
^~
vim +446 drivers/gpu/drm/i915/intel_psr.c
0bc12bcb1 Rodrigo Vivi 2014-11-14 437
a5f924097 José Roberto de Souza 2019-03-05 438 static u32 psr1_tps_regs_val_get(struct intel_dp *intel_dp)
0bc12bcb1 Rodrigo Vivi 2014-11-14 439 {
1895759ee Rodrigo Vivi 2018-08-27 440 struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
a5f924097 José Roberto de Souza 2019-03-05 441 u32 val = 0;
60e5ffe32 Rodrigo Vivi 2016-02-01 442
715dd286b José Roberto de Souza 2019-03-05 443 if (INTEL_GEN(dev_priv) >= 11)
715dd286b José Roberto de Souza 2019-03-05 444 val |= EDP_PSR_TP4_TIME_0US
715dd286b José Roberto de Souza 2019-03-05 445
77312ae8f Vathsala Nagaraju 2018-05-22 @446 if (dev_priv->vbt.psr.tp1_wakeup_time_us == 0)
77312ae8f Vathsala Nagaraju 2018-05-22 447 val |= EDP_PSR_TP1_TIME_0us;
77312ae8f Vathsala Nagaraju 2018-05-22 448 else if (dev_priv->vbt.psr.tp1_wakeup_time_us <= 100)
50db13901 Daniel Vetter 2016-05-18 449 val |= EDP_PSR_TP1_TIME_100us;
77312ae8f Vathsala Nagaraju 2018-05-22 450 else if (dev_priv->vbt.psr.tp1_wakeup_time_us <= 500)
77312ae8f Vathsala Nagaraju 2018-05-22 451 val |= EDP_PSR_TP1_TIME_500us;
50db13901 Daniel Vetter 2016-05-18 452 else
77312ae8f Vathsala Nagaraju 2018-05-22 453 val |= EDP_PSR_TP1_TIME_2500us;
50db13901 Daniel Vetter 2016-05-18 454
77312ae8f Vathsala Nagaraju 2018-05-22 455 if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us == 0)
77312ae8f Vathsala Nagaraju 2018-05-22 456 val |= EDP_PSR_TP2_TP3_TIME_0us;
77312ae8f Vathsala Nagaraju 2018-05-22 457 else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 100)
50db13901 Daniel Vetter 2016-05-18 458 val |= EDP_PSR_TP2_TP3_TIME_100us;
77312ae8f Vathsala Nagaraju 2018-05-22 459 else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 500)
77312ae8f Vathsala Nagaraju 2018-05-22 460 val |= EDP_PSR_TP2_TP3_TIME_500us;
50db13901 Daniel Vetter 2016-05-18 461 else
77312ae8f Vathsala Nagaraju 2018-05-22 462 val |= EDP_PSR_TP2_TP3_TIME_2500us;
50db13901 Daniel Vetter 2016-05-18 463
50db13901 Daniel Vetter 2016-05-18 464 if (intel_dp_source_supports_hbr2(intel_dp) &&
50db13901 Daniel Vetter 2016-05-18 465 drm_dp_tps3_supported(intel_dp->dpcd))
50db13901 Daniel Vetter 2016-05-18 466 val |= EDP_PSR_TP1_TP3_SEL;
50db13901 Daniel Vetter 2016-05-18 467 else
50db13901 Daniel Vetter 2016-05-18 468 val |= EDP_PSR_TP1_TP2_SEL;
50db13901 Daniel Vetter 2016-05-18 469
a5f924097 José Roberto de Souza 2019-03-05 470 return val;
a5f924097 José Roberto de Souza 2019-03-05 471 }
a5f924097 José Roberto de Souza 2019-03-05 472
:::::: The code at line 446 was first introduced by commit
:::::: 77312ae8f071fb389d9982ce743b72975990c4d9 drm/i915/psr: vbt change for psr
:::::: TO: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
:::::: CC: Jani Nikula <jani.nikula@intel.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
Hi José,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v5.0 next-20190305]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Jos-Roberto-de-Souza/drm-i915-vbt-Parse-and-use-the-new-field-with-PSR2-TP2-3-wakeup-time/20190306-140524
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-x019-201909 (attached as .config)
compiler: gcc-8 (Debian 8.3.0-2) 8.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
In file included from include/linux/kernel.h:10,
from include/linux/list.h:9,
from include/linux/async.h:16,
from drivers/gpu/drm/i915/intel_drv.h:28,
from drivers/gpu/drm/i915/intel_psr.c:55:
drivers/gpu/drm/i915/intel_psr.c: In function 'psr1_tps_regs_val_get':
>> include/linux/compiler.h:58:2: error: expected ';' before 'if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^~
include/linux/compiler.h:56:23: note: in expansion of macro '__trace_if'
#define if(cond, ...) __trace_if( (cond , ## __VA_ARGS__) )
^~~~~~~~~~
drivers/gpu/drm/i915/intel_psr.c:446:2: note: in expansion of macro 'if'
if (dev_priv->vbt.psr.tp1_wakeup_time_us == 0)
^~
--
In file included from include/linux/kernel.h:10,
from include/linux/list.h:9,
from include/linux/async.h:16,
from drivers/gpu//drm/i915/intel_drv.h:28,
from drivers/gpu//drm/i915/intel_psr.c:55:
drivers/gpu//drm/i915/intel_psr.c: In function 'psr1_tps_regs_val_get':
>> include/linux/compiler.h:58:2: error: expected ';' before 'if'
if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
^~
include/linux/compiler.h:56:23: note: in expansion of macro '__trace_if'
#define if(cond, ...) __trace_if( (cond , ## __VA_ARGS__) )
^~~~~~~~~~
drivers/gpu//drm/i915/intel_psr.c:446:2: note: in expansion of macro 'if'
if (dev_priv->vbt.psr.tp1_wakeup_time_us == 0)
^~
vim +58 include/linux/compiler.h
2bcd521a Steven Rostedt 2008-11-21 50
2bcd521a Steven Rostedt 2008-11-21 51 #ifdef CONFIG_PROFILE_ALL_BRANCHES
2bcd521a Steven Rostedt 2008-11-21 52 /*
2bcd521a Steven Rostedt 2008-11-21 53 * "Define 'is'", Bill Clinton
2bcd521a Steven Rostedt 2008-11-21 54 * "Define 'if'", Steven Rostedt
2bcd521a Steven Rostedt 2008-11-21 55 */
ab3c9c68 Linus Torvalds 2009-04-07 56 #define if(cond, ...) __trace_if( (cond , ## __VA_ARGS__) )
ab3c9c68 Linus Torvalds 2009-04-07 57 #define __trace_if(cond) \
b33c8ff4 Arnd Bergmann 2016-02-12 @58 if (__builtin_constant_p(!!(cond)) ? !!(cond) : \
2bcd521a Steven Rostedt 2008-11-21 59 ({ \
2bcd521a Steven Rostedt 2008-11-21 60 int ______r; \
2bcd521a Steven Rostedt 2008-11-21 61 static struct ftrace_branch_data \
e04462fb Miguel Ojeda 2018-09-03 62 __aligned(4) \
e04462fb Miguel Ojeda 2018-09-03 63 __section("_ftrace_branch") \
2bcd521a Steven Rostedt 2008-11-21 64 ______f = { \
2bcd521a Steven Rostedt 2008-11-21 65 .func = __func__, \
2bcd521a Steven Rostedt 2008-11-21 66 .file = __FILE__, \
2bcd521a Steven Rostedt 2008-11-21 67 .line = __LINE__, \
2bcd521a Steven Rostedt 2008-11-21 68 }; \
2bcd521a Steven Rostedt 2008-11-21 69 ______r = !!(cond); \
97e7e4f3 Witold Baryluk 2009-03-17 70 ______f.miss_hit[______r]++; \
2bcd521a Steven Rostedt 2008-11-21 71 ______r; \
2bcd521a Steven Rostedt 2008-11-21 72 }))
2bcd521a Steven Rostedt 2008-11-21 73 #endif /* CONFIG_PROFILE_ALL_BRANCHES */
2bcd521a Steven Rostedt 2008-11-21 74
:::::: The code at line 58 was first introduced by commit
:::::: b33c8ff4431a343561e2319f17c14286f2aa52e2 tracing: Fix freak link error caused by branch tracer
:::::: TO: Arnd Bergmann <arnd@arndb.de>
:::::: CC: Steven Rostedt <rostedt@goodmis.org>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 16ce9c609c65..a7697909e0c9 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4205,6 +4205,8 @@ enum { #define EDP_PSR_TP2_TP3_TIME_100us (1 << 8) #define EDP_PSR_TP2_TP3_TIME_2500us (2 << 8) #define EDP_PSR_TP2_TP3_TIME_0us (3 << 8) +#define EDP_PSR_TP4_TIME_SHIFT (6) /* ICL+ */ +#define EDP_PSR_TP4_TIME_0US (3 << EDP_PSR_TP4_TIME_SHIFT) /* ICL+ */ #define EDP_PSR_TP1_TIME_500us (0 << 4) #define EDP_PSR_TP1_TIME_100us (1 << 4) #define EDP_PSR_TP1_TIME_2500us (2 << 4) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 2fa2f4c9c935..b67520b5fd3c 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -442,6 +442,9 @@ static u32 psr1_tps_regs_val_get(struct intel_dp *intel_dp) struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); u32 val = 0; + if (INTEL_GEN(dev_priv) >= 11) + val |= EDP_PSR_TP4_TIME_0US + if (dev_priv->vbt.psr.tp1_wakeup_time_us == 0) val |= EDP_PSR_TP1_TIME_0us; else if (dev_priv->vbt.psr.tp1_wakeup_time_us <= 100)
TPS4 support was added to PSR because HBR3/PSR spec was not closed when ICL was freezed so if HBR3 was supported by PSR, ICL would already be ready but it was not added to spec so lets always disable TPS4. BSpec: 17524 Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_psr.c | 3 +++ 2 files changed, 5 insertions(+)