diff mbox series

drm/i915: stick to kernel fixed size types

Message ID 20190318160019.9309-1-jani.nikula@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: stick to kernel fixed size types | expand

Commit Message

Jani Nikula March 18, 2019, 4 p.m. UTC
We no longer allow mixed C99 and kernel types, and the preference is to
use kernel types exclusively. Fix the C99 types that have crept in since
the mass conversion. No functional changes.

Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Kevin Strasser <kevin.strasser@intel.com>
Cc: Ramalingam C <ramalingam.c@intel.com>
Cc: Swati Sharma <swati2.sharma@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_hdmi.c     |  2 +-
 drivers/gpu/drm/i915/intel_pipe_crc.c |  2 +-
 drivers/gpu/drm/i915/intel_sprite.c   | 10 +++++-----
 3 files changed, 7 insertions(+), 7 deletions(-)

Comments

Ville Syrjälä March 18, 2019, 4:01 p.m. UTC | #1
On Mon, Mar 18, 2019 at 06:00:19PM +0200, Jani Nikula wrote:
> We no longer allow mixed C99 and kernel types, and the preference is to
> use kernel types exclusively. Fix the C99 types that have crept in since
> the mass conversion. No functional changes.
> 
> Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> Cc: Kevin Strasser <kevin.strasser@intel.com>
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Cc: Swati Sharma <swati2.sharma@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_hdmi.c     |  2 +-
>  drivers/gpu/drm/i915/intel_pipe_crc.c |  2 +-
>  drivers/gpu/drm/i915/intel_sprite.c   | 10 +++++-----
>  3 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index 5ccb305a6e1c..26767785f14a 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -1494,7 +1494,7 @@ static struct hdcp2_hdmi_msg_data {
>  
>  static
>  int intel_hdmi_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
> -				    uint8_t *rx_status)
> +				    u8 *rx_status)
>  {
>  	return intel_hdmi_hdcp_read(intel_dig_port,
>  				    HDCP_2_2_HDMI_REG_RXSTATUS_OFFSET,
> diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
> index 64a98712d61f..0b1378f0bff7 100644
> --- a/drivers/gpu/drm/i915/intel_pipe_crc.c
> +++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
> @@ -363,7 +363,7 @@ static int ivb_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
>  static int skl_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
>  				enum pipe pipe,
>  				enum intel_pipe_crc_source *source,
> -				uint32_t *val)
> +				u32 *val)
>  {
>  	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)
>  		*source = INTEL_PIPE_CRC_SOURCE_PIPE;
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index e00559d4cf5a..d46af46027b6 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -1818,7 +1818,7 @@ static const u32 skl_plane_formats[] = {
>  	DRM_FORMAT_VYUY,
>  };
>  
> -static const uint32_t icl_plane_formats[] = {
> +static const u32 icl_plane_formats[] = {
>  	DRM_FORMAT_C8,
>  	DRM_FORMAT_RGB565,
>  	DRM_FORMAT_XRGB8888,
> @@ -1839,7 +1839,7 @@ static const uint32_t icl_plane_formats[] = {
>  	DRM_FORMAT_Y416,
>  };
>  
> -static const uint32_t icl_hdr_plane_formats[] = {
> +static const u32 icl_hdr_plane_formats[] = {
>  	DRM_FORMAT_C8,
>  	DRM_FORMAT_RGB565,
>  	DRM_FORMAT_XRGB8888,
> @@ -1880,7 +1880,7 @@ static const u32 skl_planar_formats[] = {
>  	DRM_FORMAT_NV12,
>  };
>  
> -static const uint32_t glk_planar_formats[] = {
> +static const u32 glk_planar_formats[] = {
>  	DRM_FORMAT_C8,
>  	DRM_FORMAT_RGB565,
>  	DRM_FORMAT_XRGB8888,
> @@ -1899,7 +1899,7 @@ static const uint32_t glk_planar_formats[] = {
>  	DRM_FORMAT_P016,
>  };
>  
> -static const uint32_t icl_planar_formats[] = {
> +static const u32 icl_planar_formats[] = {
>  	DRM_FORMAT_C8,
>  	DRM_FORMAT_RGB565,
>  	DRM_FORMAT_XRGB8888,
> @@ -1924,7 +1924,7 @@ static const uint32_t icl_planar_formats[] = {
>  	DRM_FORMAT_Y416,
>  };
>  
> -static const uint32_t icl_hdr_planar_formats[] = {
> +static const u32 icl_hdr_planar_formats[] = {
>  	DRM_FORMAT_C8,
>  	DRM_FORMAT_RGB565,
>  	DRM_FORMAT_XRGB8888,
> -- 
> 2.20.1
Jani Nikula March 19, 2019, 8:20 a.m. UTC | #2
On Mon, 18 Mar 2019, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Mon, Mar 18, 2019 at 06:00:19PM +0200, Jani Nikula wrote:
>> We no longer allow mixed C99 and kernel types, and the preference is to
>> use kernel types exclusively. Fix the C99 types that have crept in since
>> the mass conversion. No functional changes.
>> 
>> Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>> Cc: Kevin Strasser <kevin.strasser@intel.com>
>> Cc: Ramalingam C <ramalingam.c@intel.com>
>> Cc: Swati Sharma <swati2.sharma@intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pushed, thanks for the review.

BR,
Jani.

>
>> ---
>>  drivers/gpu/drm/i915/intel_hdmi.c     |  2 +-
>>  drivers/gpu/drm/i915/intel_pipe_crc.c |  2 +-
>>  drivers/gpu/drm/i915/intel_sprite.c   | 10 +++++-----
>>  3 files changed, 7 insertions(+), 7 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
>> index 5ccb305a6e1c..26767785f14a 100644
>> --- a/drivers/gpu/drm/i915/intel_hdmi.c
>> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
>> @@ -1494,7 +1494,7 @@ static struct hdcp2_hdmi_msg_data {
>>  
>>  static
>>  int intel_hdmi_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
>> -				    uint8_t *rx_status)
>> +				    u8 *rx_status)
>>  {
>>  	return intel_hdmi_hdcp_read(intel_dig_port,
>>  				    HDCP_2_2_HDMI_REG_RXSTATUS_OFFSET,
>> diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
>> index 64a98712d61f..0b1378f0bff7 100644
>> --- a/drivers/gpu/drm/i915/intel_pipe_crc.c
>> +++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
>> @@ -363,7 +363,7 @@ static int ivb_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
>>  static int skl_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
>>  				enum pipe pipe,
>>  				enum intel_pipe_crc_source *source,
>> -				uint32_t *val)
>> +				u32 *val)
>>  {
>>  	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)
>>  		*source = INTEL_PIPE_CRC_SOURCE_PIPE;
>> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
>> index e00559d4cf5a..d46af46027b6 100644
>> --- a/drivers/gpu/drm/i915/intel_sprite.c
>> +++ b/drivers/gpu/drm/i915/intel_sprite.c
>> @@ -1818,7 +1818,7 @@ static const u32 skl_plane_formats[] = {
>>  	DRM_FORMAT_VYUY,
>>  };
>>  
>> -static const uint32_t icl_plane_formats[] = {
>> +static const u32 icl_plane_formats[] = {
>>  	DRM_FORMAT_C8,
>>  	DRM_FORMAT_RGB565,
>>  	DRM_FORMAT_XRGB8888,
>> @@ -1839,7 +1839,7 @@ static const uint32_t icl_plane_formats[] = {
>>  	DRM_FORMAT_Y416,
>>  };
>>  
>> -static const uint32_t icl_hdr_plane_formats[] = {
>> +static const u32 icl_hdr_plane_formats[] = {
>>  	DRM_FORMAT_C8,
>>  	DRM_FORMAT_RGB565,
>>  	DRM_FORMAT_XRGB8888,
>> @@ -1880,7 +1880,7 @@ static const u32 skl_planar_formats[] = {
>>  	DRM_FORMAT_NV12,
>>  };
>>  
>> -static const uint32_t glk_planar_formats[] = {
>> +static const u32 glk_planar_formats[] = {
>>  	DRM_FORMAT_C8,
>>  	DRM_FORMAT_RGB565,
>>  	DRM_FORMAT_XRGB8888,
>> @@ -1899,7 +1899,7 @@ static const uint32_t glk_planar_formats[] = {
>>  	DRM_FORMAT_P016,
>>  };
>>  
>> -static const uint32_t icl_planar_formats[] = {
>> +static const u32 icl_planar_formats[] = {
>>  	DRM_FORMAT_C8,
>>  	DRM_FORMAT_RGB565,
>>  	DRM_FORMAT_XRGB8888,
>> @@ -1924,7 +1924,7 @@ static const uint32_t icl_planar_formats[] = {
>>  	DRM_FORMAT_Y416,
>>  };
>>  
>> -static const uint32_t icl_hdr_planar_formats[] = {
>> +static const u32 icl_hdr_planar_formats[] = {
>>  	DRM_FORMAT_C8,
>>  	DRM_FORMAT_RGB565,
>>  	DRM_FORMAT_XRGB8888,
>> -- 
>> 2.20.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 5ccb305a6e1c..26767785f14a 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1494,7 +1494,7 @@  static struct hdcp2_hdmi_msg_data {
 
 static
 int intel_hdmi_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
-				    uint8_t *rx_status)
+				    u8 *rx_status)
 {
 	return intel_hdmi_hdcp_read(intel_dig_port,
 				    HDCP_2_2_HDMI_REG_RXSTATUS_OFFSET,
diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
index 64a98712d61f..0b1378f0bff7 100644
--- a/drivers/gpu/drm/i915/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
@@ -363,7 +363,7 @@  static int ivb_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
 static int skl_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv,
 				enum pipe pipe,
 				enum intel_pipe_crc_source *source,
-				uint32_t *val)
+				u32 *val)
 {
 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)
 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index e00559d4cf5a..d46af46027b6 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1818,7 +1818,7 @@  static const u32 skl_plane_formats[] = {
 	DRM_FORMAT_VYUY,
 };
 
-static const uint32_t icl_plane_formats[] = {
+static const u32 icl_plane_formats[] = {
 	DRM_FORMAT_C8,
 	DRM_FORMAT_RGB565,
 	DRM_FORMAT_XRGB8888,
@@ -1839,7 +1839,7 @@  static const uint32_t icl_plane_formats[] = {
 	DRM_FORMAT_Y416,
 };
 
-static const uint32_t icl_hdr_plane_formats[] = {
+static const u32 icl_hdr_plane_formats[] = {
 	DRM_FORMAT_C8,
 	DRM_FORMAT_RGB565,
 	DRM_FORMAT_XRGB8888,
@@ -1880,7 +1880,7 @@  static const u32 skl_planar_formats[] = {
 	DRM_FORMAT_NV12,
 };
 
-static const uint32_t glk_planar_formats[] = {
+static const u32 glk_planar_formats[] = {
 	DRM_FORMAT_C8,
 	DRM_FORMAT_RGB565,
 	DRM_FORMAT_XRGB8888,
@@ -1899,7 +1899,7 @@  static const uint32_t glk_planar_formats[] = {
 	DRM_FORMAT_P016,
 };
 
-static const uint32_t icl_planar_formats[] = {
+static const u32 icl_planar_formats[] = {
 	DRM_FORMAT_C8,
 	DRM_FORMAT_RGB565,
 	DRM_FORMAT_XRGB8888,
@@ -1924,7 +1924,7 @@  static const uint32_t icl_planar_formats[] = {
 	DRM_FORMAT_Y416,
 };
 
-static const uint32_t icl_hdr_planar_formats[] = {
+static const u32 icl_hdr_planar_formats[] = {
 	DRM_FORMAT_C8,
 	DRM_FORMAT_RGB565,
 	DRM_FORMAT_XRGB8888,