From patchwork Fri Mar 22 23:41:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Santa, Carlos" X-Patchwork-Id: 10866659 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AFAB913B5 for ; Fri, 22 Mar 2019 23:42:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9276F2A923 for ; Fri, 22 Mar 2019 23:42:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 86D7B2AA25; Fri, 22 Mar 2019 23:42:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8BAC92AA28 for ; Fri, 22 Mar 2019 23:42:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4EEAE6E3ED; Fri, 22 Mar 2019 23:42:26 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6CB2F6E3E2 for ; Fri, 22 Mar 2019 23:42:16 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Mar 2019 16:42:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,256,1549958400"; d="scan'208";a="309635792" Received: from miryad.jf.intel.com ([10.54.74.35]) by orsmga005.jf.intel.com with ESMTP; 22 Mar 2019 16:42:15 -0700 From: Carlos Santa To: intel-gfx@lists.freedesktop.org Date: Fri, 22 Mar 2019 16:41:18 -0700 Message-Id: <20190322234118.65980-6-carlos.santa@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190322234118.65980-1-carlos.santa@intel.com> References: <20190322234118.65980-1-carlos.santa@intel.com> Subject: [Intel-gfx] [PATCH v5 5/5] drm/i915: Watchdog timeout: Include threshold value in error state X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michel Thierry MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Michel Thierry Save the watchdog threshold (in us) as part of the engine state. v2: Only do it for gen8+ (and prevent a missing-case warn). v3: use ctx->__engine. v4: Rebase. v5: Rebase. v6: Rebase, use intel_context_lookup() Cc: Antonio Argenziano Cc: Tvrtko Ursulin Signed-off-by: Michel Thierry Signed-off-by: Carlos Santa --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_gpu_error.c | 14 ++++++++++---- drivers/gpu/drm/i915/i915_gpu_error.h | 1 + 3 files changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 5324397c3801..5dbb3938e159 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3118,6 +3118,8 @@ i915_gem_context_lookup(struct drm_i915_file_private *file_priv, u32 id) return ctx; } +u32 watchdog_to_us(struct drm_i915_private *i915, u32 value_in_clock_counts); + int i915_perf_open_ioctl(struct drm_device *dev, void *data, struct drm_file *file); int i915_perf_add_config_ioctl(struct drm_device *dev, void *data, diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 26bac517e383..1f8d29bf00d0 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -454,9 +454,11 @@ static void error_print_context(struct drm_i915_error_state_buf *m, const char *header, const struct drm_i915_error_context *ctx) { - err_printf(m, "%s%s[%d] user_handle %d hw_id %d, prio %d, guilty %d active %d\n", + err_printf(m, "%s%s[%d] user_handle %d hw_id %d, prio %d, guilty %d active %d, watchdog %dus\n", header, ctx->comm, ctx->pid, ctx->handle, ctx->hw_id, - ctx->sched_attr.priority, ctx->guilty, ctx->active); + ctx->sched_attr.priority, ctx->guilty, ctx->active, + INTEL_GEN(m->i915) >= 8 ? + watchdog_to_us(m->i915, ctx->watchdog_threshold) : 0); } static void error_print_engine(struct drm_i915_error_state_buf *m, @@ -1316,8 +1318,11 @@ static void error_record_engine_execlists(struct intel_engine_cs *engine, } static void record_context(struct drm_i915_error_context *e, - struct i915_gem_context *ctx) + struct i915_gem_context *ctx, + u32 engine_id) { + struct drm_i915_private *dev_priv = ctx->i915; + if (ctx->pid) { struct task_struct *task; @@ -1335,6 +1340,7 @@ static void record_context(struct drm_i915_error_context *e, e->sched_attr = ctx->sched; e->guilty = atomic_read(&ctx->guilty_count); e->active = atomic_read(&ctx->active_count); + e->watchdog_threshold = intel_context_lookup(ctx, dev_priv->engine[engine_id])->watchdog_threshold; } static void request_record_user_bo(struct i915_request *request, @@ -1418,7 +1424,7 @@ static void gem_record_rings(struct i915_gpu_state *error) ee->vm = ctx->ppgtt ? &ctx->ppgtt->vm : &ggtt->vm; - record_context(&ee->context, ctx); + record_context(&ee->context, ctx, engine->id); /* We need to copy these to an anonymous buffer * as the simplest method to avoid being overwritten diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h index 6cf6a8679b26..439a31f5db3b 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.h +++ b/drivers/gpu/drm/i915/i915_gpu_error.h @@ -120,6 +120,7 @@ struct i915_gpu_state { u32 hw_id; int active; int guilty; + int watchdog_threshold; struct i915_sched_attr sched_attr; } context;