| Message ID | 20190425185253.3197-1-imre.deak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/2] drm/i915/icl: Factor out combo PHY lane power setup helper | expand |
On Thu, 25 Apr 2019, Imre Deak <imre.deak@intel.com> wrote: > Factor out the combo PHY lane power configuration code to a separate > helper; it will be also needed by the next patch adding the same > configuration for DDI ports. > > Add support for DDI ports and lane reversal as preparation for the next > patch. > > The PWR_DOWN_LN_1 value is unspecified in the BSpec register description > so remove it. > > v2: > - Fix up the wrong assumption that the encodings are the same for DDI > and DSI ports. (Jani) > Both patches look good to me, but I'm afraid patch 1 conflicts with the header refactoring I pushed earlier, as well as the function name changes in [1]. I think I'd like the function here to be renamed accordingly. Other than that, for both, Reviewed-by: Jani Nikula <jani.nikula@intel.com> [1] http://patchwork.freedesktop.org/patch/msgid/20190430124128.23606-1-jani.nikula@intel.com > Cc: Jani Nikula <jani.nikula@intel.com> > Cc: Madhav Chauhan <madhav.chauhan@intel.com> > Cc: Ville Syrjala <ville.syrjala@linux.intel.com> > Signed-off-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 3 ++ > drivers/gpu/drm/i915/i915_reg.h | 1 - > drivers/gpu/drm/i915/icl_dsi.c | 26 ++--------------- > drivers/gpu/drm/i915/intel_combo_phy.c | 52 ++++++++++++++++++++++++++++++++++ > 4 files changed, 58 insertions(+), 24 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index dc74d33c20aa..87f24d92e355 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -3515,6 +3515,9 @@ void icl_combo_phys_init(struct drm_i915_private *dev_priv); > void icl_combo_phys_uninit(struct drm_i915_private *dev_priv); > void cnl_combo_phys_init(struct drm_i915_private *dev_priv); > void cnl_combo_phys_uninit(struct drm_i915_private *dev_priv); > +void icl_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv, > + enum port port, bool is_dsi, > + int lane_count, bool lane_reversal); > > int intel_gpu_freq(struct drm_i915_private *dev_priv, int val); > int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index b74824f0b5b1..e332b9f69a4a 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1813,7 +1813,6 @@ enum i915_power_well_id { > #define PWR_DOWN_LN_3 (0x8 << 4) > #define PWR_DOWN_LN_2_1_0 (0x7 << 4) > #define PWR_DOWN_LN_1_0 (0x3 << 4) > -#define PWR_DOWN_LN_1 (0x2 << 4) > #define PWR_DOWN_LN_3_1 (0xa << 4) > #define PWR_DOWN_LN_3_1_0 (0xb << 4) > #define PWR_DOWN_LN_MASK (0xf << 4) > diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c > index 9d962ea1e635..f2113d3798b0 100644 > --- a/drivers/gpu/drm/i915/icl_dsi.c > +++ b/drivers/gpu/drm/i915/icl_dsi.c > @@ -363,30 +363,10 @@ static void gen11_dsi_power_up_lanes(struct intel_encoder *encoder) > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); > enum port port; > - u32 tmp; > - u32 lane_mask; > > - switch (intel_dsi->lane_count) { > - case 1: > - lane_mask = PWR_DOWN_LN_3_1_0; > - break; > - case 2: > - lane_mask = PWR_DOWN_LN_3_1; > - break; > - case 3: > - lane_mask = PWR_DOWN_LN_3; > - break; > - case 4: > - default: > - lane_mask = PWR_UP_ALL_LANES; > - break; > - } > - > - for_each_dsi_port(port, intel_dsi->ports) { > - tmp = I915_READ(ICL_PORT_CL_DW10(port)); > - tmp &= ~PWR_DOWN_LN_MASK; > - I915_WRITE(ICL_PORT_CL_DW10(port), tmp | lane_mask); > - } > + for_each_dsi_port(port, intel_dsi->ports) > + icl_combo_phy_power_up_lanes(dev_priv, port, true, > + intel_dsi->lane_count, false); > } > > static void gen11_dsi_config_phy_lanes_sequence(struct intel_encoder *encoder) > diff --git a/drivers/gpu/drm/i915/intel_combo_phy.c b/drivers/gpu/drm/i915/intel_combo_phy.c > index 2bf4359d7e41..5478808886f1 100644 > --- a/drivers/gpu/drm/i915/intel_combo_phy.c > +++ b/drivers/gpu/drm/i915/intel_combo_phy.c > @@ -203,6 +203,58 @@ static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv, > return ret; > } > > +void icl_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv, > + enum port port, bool is_dsi, > + int lane_count, bool lane_reversal) > +{ > + u8 lane_mask; > + u32 val; > + > + if (is_dsi) { > + WARN_ON(lane_reversal); > + > + switch (lane_count) { > + case 1: > + lane_mask = PWR_DOWN_LN_3_1_0; > + break; > + case 2: > + lane_mask = PWR_DOWN_LN_3_1; > + break; > + case 3: > + lane_mask = PWR_DOWN_LN_3; > + break; > + default: > + MISSING_CASE(lane_count); > + /* fall-through */ > + case 4: > + lane_mask = PWR_UP_ALL_LANES; > + break; > + } > + } else { > + switch (lane_count) { > + case 1: > + lane_mask = lane_reversal ? PWR_DOWN_LN_2_1_0 : > + PWR_DOWN_LN_3_2_1; > + break; > + case 2: > + lane_mask = lane_reversal ? PWR_DOWN_LN_1_0 : > + PWR_DOWN_LN_3_2; > + break; > + default: > + MISSING_CASE(lane_count); > + /* fall-through */ > + case 4: > + lane_mask = PWR_UP_ALL_LANES; > + break; > + } > + } > + > + val = I915_READ(ICL_PORT_CL_DW10(port)); > + val &= ~PWR_DOWN_LN_MASK; > + val |= lane_mask << PWR_DOWN_LN_SHIFT; > + I915_WRITE(ICL_PORT_CL_DW10(port), val); > +} > + > void icl_combo_phys_init(struct drm_i915_private *dev_priv) > { > enum port port;
On Tue, Apr 30, 2019 at 03:44:00PM +0300, Jani Nikula wrote: > On Thu, 25 Apr 2019, Imre Deak <imre.deak@intel.com> wrote: > > Factor out the combo PHY lane power configuration code to a separate > > helper; it will be also needed by the next patch adding the same > > configuration for DDI ports. > > > > Add support for DDI ports and lane reversal as preparation for the next > > patch. > > > > The PWR_DOWN_LN_1 value is unspecified in the BSpec register description > > so remove it. > > > > v2: > > - Fix up the wrong assumption that the encodings are the same for DDI > > and DSI ports. (Jani) > > > > Both patches look good to me, but I'm afraid patch 1 conflicts with the > header refactoring I pushed earlier, as well as the function name > changes in [1]. I think I'd like the function here to be renamed > accordingly. > > Other than that, for both, > > Reviewed-by: Jani Nikula <jani.nikula@intel.com> Thanks. Yes, that naming scheme makes sense, will do the rename before pushing the patches. > > [1] http://patchwork.freedesktop.org/patch/msgid/20190430124128.23606-1-jani.nikula@intel.com > > > > Cc: Jani Nikula <jani.nikula@intel.com> > > Cc: Madhav Chauhan <madhav.chauhan@intel.com> > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com> > > Signed-off-by: Imre Deak <imre.deak@intel.com> > > --- > > drivers/gpu/drm/i915/i915_drv.h | 3 ++ > > drivers/gpu/drm/i915/i915_reg.h | 1 - > > drivers/gpu/drm/i915/icl_dsi.c | 26 ++--------------- > > drivers/gpu/drm/i915/intel_combo_phy.c | 52 ++++++++++++++++++++++++++++++++++ > > 4 files changed, 58 insertions(+), 24 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > > index dc74d33c20aa..87f24d92e355 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.h > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > @@ -3515,6 +3515,9 @@ void icl_combo_phys_init(struct drm_i915_private *dev_priv); > > void icl_combo_phys_uninit(struct drm_i915_private *dev_priv); > > void cnl_combo_phys_init(struct drm_i915_private *dev_priv); > > void cnl_combo_phys_uninit(struct drm_i915_private *dev_priv); > > +void icl_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv, > > + enum port port, bool is_dsi, > > + int lane_count, bool lane_reversal); > > > > int intel_gpu_freq(struct drm_i915_private *dev_priv, int val); > > int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index b74824f0b5b1..e332b9f69a4a 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -1813,7 +1813,6 @@ enum i915_power_well_id { > > #define PWR_DOWN_LN_3 (0x8 << 4) > > #define PWR_DOWN_LN_2_1_0 (0x7 << 4) > > #define PWR_DOWN_LN_1_0 (0x3 << 4) > > -#define PWR_DOWN_LN_1 (0x2 << 4) > > #define PWR_DOWN_LN_3_1 (0xa << 4) > > #define PWR_DOWN_LN_3_1_0 (0xb << 4) > > #define PWR_DOWN_LN_MASK (0xf << 4) > > diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c > > index 9d962ea1e635..f2113d3798b0 100644 > > --- a/drivers/gpu/drm/i915/icl_dsi.c > > +++ b/drivers/gpu/drm/i915/icl_dsi.c > > @@ -363,30 +363,10 @@ static void gen11_dsi_power_up_lanes(struct intel_encoder *encoder) > > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > > struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); > > enum port port; > > - u32 tmp; > > - u32 lane_mask; > > > > - switch (intel_dsi->lane_count) { > > - case 1: > > - lane_mask = PWR_DOWN_LN_3_1_0; > > - break; > > - case 2: > > - lane_mask = PWR_DOWN_LN_3_1; > > - break; > > - case 3: > > - lane_mask = PWR_DOWN_LN_3; > > - break; > > - case 4: > > - default: > > - lane_mask = PWR_UP_ALL_LANES; > > - break; > > - } > > - > > - for_each_dsi_port(port, intel_dsi->ports) { > > - tmp = I915_READ(ICL_PORT_CL_DW10(port)); > > - tmp &= ~PWR_DOWN_LN_MASK; > > - I915_WRITE(ICL_PORT_CL_DW10(port), tmp | lane_mask); > > - } > > + for_each_dsi_port(port, intel_dsi->ports) > > + icl_combo_phy_power_up_lanes(dev_priv, port, true, > > + intel_dsi->lane_count, false); > > } > > > > static void gen11_dsi_config_phy_lanes_sequence(struct intel_encoder *encoder) > > diff --git a/drivers/gpu/drm/i915/intel_combo_phy.c b/drivers/gpu/drm/i915/intel_combo_phy.c > > index 2bf4359d7e41..5478808886f1 100644 > > --- a/drivers/gpu/drm/i915/intel_combo_phy.c > > +++ b/drivers/gpu/drm/i915/intel_combo_phy.c > > @@ -203,6 +203,58 @@ static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv, > > return ret; > > } > > > > +void icl_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv, > > + enum port port, bool is_dsi, > > + int lane_count, bool lane_reversal) > > +{ > > + u8 lane_mask; > > + u32 val; > > + > > + if (is_dsi) { > > + WARN_ON(lane_reversal); > > + > > + switch (lane_count) { > > + case 1: > > + lane_mask = PWR_DOWN_LN_3_1_0; > > + break; > > + case 2: > > + lane_mask = PWR_DOWN_LN_3_1; > > + break; > > + case 3: > > + lane_mask = PWR_DOWN_LN_3; > > + break; > > + default: > > + MISSING_CASE(lane_count); > > + /* fall-through */ > > + case 4: > > + lane_mask = PWR_UP_ALL_LANES; > > + break; > > + } > > + } else { > > + switch (lane_count) { > > + case 1: > > + lane_mask = lane_reversal ? PWR_DOWN_LN_2_1_0 : > > + PWR_DOWN_LN_3_2_1; > > + break; > > + case 2: > > + lane_mask = lane_reversal ? PWR_DOWN_LN_1_0 : > > + PWR_DOWN_LN_3_2; > > + break; > > + default: > > + MISSING_CASE(lane_count); > > + /* fall-through */ > > + case 4: > > + lane_mask = PWR_UP_ALL_LANES; > > + break; > > + } > > + } > > + > > + val = I915_READ(ICL_PORT_CL_DW10(port)); > > + val &= ~PWR_DOWN_LN_MASK; > > + val |= lane_mask << PWR_DOWN_LN_SHIFT; > > + I915_WRITE(ICL_PORT_CL_DW10(port), val); > > +} > > + > > void icl_combo_phys_init(struct drm_i915_private *dev_priv) > > { > > enum port port; > > -- > Jani Nikula, Intel Open Source Graphics Center
On Fri, Apr 26, 2019 at 08:39:12AM +0000, Patchwork wrote: > == Series Details == > > Series: series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY lane power setup helper > URL : https://patchwork.freedesktop.org/series/59954/ > State : success Thanks for the review, series pushed to -dinq, with the s/icl_/intel_/ change and adding the headers to intel_combo_phy.h required by the recent header refactoring. > > == Summary == > > CI Bug Log - changes from CI_DRM_6000_full -> Patchwork_12877_full > ==================================================== > > Summary > ------- > > **SUCCESS** > > No regressions found. > > > > Known issues > ------------ > > Here are the changes found in Patchwork_12877_full that come from known issues: > > ### IGT changes ### > > #### Issues hit #### > > * igt@gem_tiled_swapping@non-threaded: > - shard-iclb: [PASS][1] -> [DMESG-WARN][2] ([fdo#108686]) > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb6/igt@gem_tiled_swapping@non-threaded.html > [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb3/igt@gem_tiled_swapping@non-threaded.html > > * igt@i915_pm_rpm@legacy-planes: > - shard-skl: [PASS][3] -> [INCOMPLETE][4] ([fdo#107807]) > [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl5/igt@i915_pm_rpm@legacy-planes.html > [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl6/igt@i915_pm_rpm@legacy-planes.html > > * igt@kms_cursor_crc@cursor-64x64-dpms: > - shard-skl: [PASS][5] -> [FAIL][6] ([fdo#103232]) > [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@kms_cursor_crc@cursor-64x64-dpms.html > [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl5/igt@kms_cursor_crc@cursor-64x64-dpms.html > > * igt@kms_flip@flip-vs-expired-vblank-interruptible: > - shard-skl: [PASS][7] -> [FAIL][8] ([fdo#105363]) > [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html > [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html > > * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt: > - shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#103167]) > [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html > [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html > > * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: > - shard-skl: [PASS][11] -> [INCOMPLETE][12] ([fdo#104108]) > [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html > [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html > > * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: > - shard-skl: [PASS][13] -> [FAIL][14] ([fdo#108145] / [fdo#110403]) > [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html > [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html > > * igt@kms_psr2_su@frontbuffer: > - shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#109642]) > [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_psr2_su@frontbuffer.html > [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb1/igt@kms_psr2_su@frontbuffer.html > > * igt@kms_psr@psr2_sprite_render: > - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441]) +2 similar issues > [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_psr@psr2_sprite_render.html > [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb8/igt@kms_psr@psr2_sprite_render.html > > * igt@kms_psr@suspend: > - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([fdo#107773]) > [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl7/igt@kms_psr@suspend.html > [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl1/igt@kms_psr@suspend.html > > * igt@kms_rotation_crc@multiplane-rotation: > - shard-kbl: [PASS][21] -> [INCOMPLETE][22] ([fdo#103665]) > [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl4/igt@kms_rotation_crc@multiplane-rotation.html > [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-kbl4/igt@kms_rotation_crc@multiplane-rotation.html > > * igt@kms_vblank@pipe-a-ts-continuation-suspend: > - shard-apl: [PASS][23] -> [DMESG-WARN][24] ([fdo#108566]) +4 similar issues > [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html > [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-apl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html > > > #### Possible fixes #### > > * igt@gem_ctx_isolation@rcs0-s3: > - shard-kbl: [INCOMPLETE][25] ([fdo#103665]) -> [PASS][26] > [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl2/igt@gem_ctx_isolation@rcs0-s3.html > [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-kbl7/igt@gem_ctx_isolation@rcs0-s3.html > > * igt@kms_cursor_crc@cursor-256x256-suspend: > - shard-kbl: [DMESG-WARN][27] ([fdo#108566]) -> [PASS][28] > [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl5/igt@kms_cursor_crc@cursor-256x256-suspend.html > [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-kbl4/igt@kms_cursor_crc@cursor-256x256-suspend.html > > * igt@kms_cursor_crc@cursor-alpha-transparent: > - shard-skl: [FAIL][29] ([fdo#109350]) -> [PASS][30] > [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl10/igt@kms_cursor_crc@cursor-alpha-transparent.html > [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl1/igt@kms_cursor_crc@cursor-alpha-transparent.html > > * igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled: > - shard-skl: [FAIL][31] ([fdo#103184]) -> [PASS][32] > [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl5/igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled.html > [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl10/igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled.html > > * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: > - shard-iclb: [FAIL][33] ([fdo#103167]) -> [PASS][34] +5 similar issues > [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html > [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html > > * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: > - shard-skl: [FAIL][35] ([fdo#108145] / [fdo#110403]) -> [PASS][36] > [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html > [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html > > * igt@kms_psr@psr2_basic: > - shard-iclb: [SKIP][37] ([fdo#109441]) -> [PASS][38] +1 similar issue > [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb5/igt@kms_psr@psr2_basic.html > [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb2/igt@kms_psr@psr2_basic.html > > * igt@kms_rotation_crc@multiplane-rotation-cropping-top: > - shard-kbl: [FAIL][39] ([fdo#109016]) -> [PASS][40] > [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl7/igt@kms_rotation_crc@multiplane-rotation-cropping-top.html > [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-kbl7/igt@kms_rotation_crc@multiplane-rotation-cropping-top.html > > * igt@kms_sysfs_edid_timing: > - shard-iclb: [FAIL][41] ([fdo#100047]) -> [PASS][42] > [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb3/igt@kms_sysfs_edid_timing.html > [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb6/igt@kms_sysfs_edid_timing.html > > * igt@kms_vblank@pipe-c-ts-continuation-suspend: > - shard-apl: [DMESG-WARN][43] ([fdo#108566]) -> [PASS][44] +2 similar issues > [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl4/igt@kms_vblank@pipe-c-ts-continuation-suspend.html > [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-apl2/igt@kms_vblank@pipe-c-ts-continuation-suspend.html > > > #### Warnings #### > > * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt: > - shard-apl: [SKIP][45] ([fdo#109271]) -> [INCOMPLETE][46] ([fdo#103927]) > [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt.html > [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-apl3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt.html > > > [fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047 > [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 > [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184 > [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 > [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 > [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 > [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 > [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 > [fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773 > [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807 > [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 > [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 > [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686 > [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016 > [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 > [fdo#109350]: https://bugs.freedesktop.org/show_bug.cgi?id=109350 > [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 > [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 > [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403 > > > Participating hosts (10 -> 9) > ------------------------------ > > Missing (1): pig-skl-6260u > > > Build changes > ------------- > > * Linux: CI_DRM_6000 -> Patchwork_12877 > > CI_DRM_6000: a0c3fff52846356f63dd210cddf81e5bb01e7aa0 @ git://anongit.freedesktop.org/gfx-ci/linux > IGT_4966: a75429544f5721316b04a36551c57573e0c79486 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_12877: 3e68f512f96fa2753bc9ebbba8604e463db1eb9d @ git://anongit.freedesktop.org/gfx-ci/linux > piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/
On Thu, 02 May 2019, Imre Deak <imre.deak@intel.com> wrote: > On Fri, Apr 26, 2019 at 08:39:12AM +0000, Patchwork wrote: >> == Series Details == >> >> Series: series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY lane power setup helper >> URL : https://patchwork.freedesktop.org/series/59954/ >> State : success > > Thanks for the review, series pushed to -dinq, with the s/icl_/intel_/ > change and adding the headers to intel_combo_phy.h required by the > recent header refactoring. Hey, I expected a resend. Please always resend the the rebased patches for CI, and only push patches that have gone through CI! BR, Jani. > >> >> == Summary == >> >> CI Bug Log - changes from CI_DRM_6000_full -> Patchwork_12877_full >> ==================================================== >> >> Summary >> ------- >> >> **SUCCESS** >> >> No regressions found. >> >> >> >> Known issues >> ------------ >> >> Here are the changes found in Patchwork_12877_full that come from known issues: >> >> ### IGT changes ### >> >> #### Issues hit #### >> >> * igt@gem_tiled_swapping@non-threaded: >> - shard-iclb: [PASS][1] -> [DMESG-WARN][2] ([fdo#108686]) >> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb6/igt@gem_tiled_swapping@non-threaded.html >> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb3/igt@gem_tiled_swapping@non-threaded.html >> >> * igt@i915_pm_rpm@legacy-planes: >> - shard-skl: [PASS][3] -> [INCOMPLETE][4] ([fdo#107807]) >> [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl5/igt@i915_pm_rpm@legacy-planes.html >> [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl6/igt@i915_pm_rpm@legacy-planes.html >> >> * igt@kms_cursor_crc@cursor-64x64-dpms: >> - shard-skl: [PASS][5] -> [FAIL][6] ([fdo#103232]) >> [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@kms_cursor_crc@cursor-64x64-dpms.html >> [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl5/igt@kms_cursor_crc@cursor-64x64-dpms.html >> >> * igt@kms_flip@flip-vs-expired-vblank-interruptible: >> - shard-skl: [PASS][7] -> [FAIL][8] ([fdo#105363]) >> [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html >> [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html >> >> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt: >> - shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#103167]) >> [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html >> [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html >> >> * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: >> - shard-skl: [PASS][11] -> [INCOMPLETE][12] ([fdo#104108]) >> [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html >> [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html >> >> * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: >> - shard-skl: [PASS][13] -> [FAIL][14] ([fdo#108145] / [fdo#110403]) >> [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html >> [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html >> >> * igt@kms_psr2_su@frontbuffer: >> - shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#109642]) >> [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_psr2_su@frontbuffer.html >> [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb1/igt@kms_psr2_su@frontbuffer.html >> >> * igt@kms_psr@psr2_sprite_render: >> - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441]) +2 similar issues >> [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_psr@psr2_sprite_render.html >> [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb8/igt@kms_psr@psr2_sprite_render.html >> >> * igt@kms_psr@suspend: >> - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([fdo#107773]) >> [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl7/igt@kms_psr@suspend.html >> [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl1/igt@kms_psr@suspend.html >> >> * igt@kms_rotation_crc@multiplane-rotation: >> - shard-kbl: [PASS][21] -> [INCOMPLETE][22] ([fdo#103665]) >> [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl4/igt@kms_rotation_crc@multiplane-rotation.html >> [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-kbl4/igt@kms_rotation_crc@multiplane-rotation.html >> >> * igt@kms_vblank@pipe-a-ts-continuation-suspend: >> - shard-apl: [PASS][23] -> [DMESG-WARN][24] ([fdo#108566]) +4 similar issues >> [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html >> [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-apl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html >> >> >> #### Possible fixes #### >> >> * igt@gem_ctx_isolation@rcs0-s3: >> - shard-kbl: [INCOMPLETE][25] ([fdo#103665]) -> [PASS][26] >> [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl2/igt@gem_ctx_isolation@rcs0-s3.html >> [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-kbl7/igt@gem_ctx_isolation@rcs0-s3.html >> >> * igt@kms_cursor_crc@cursor-256x256-suspend: >> - shard-kbl: [DMESG-WARN][27] ([fdo#108566]) -> [PASS][28] >> [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl5/igt@kms_cursor_crc@cursor-256x256-suspend.html >> [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-kbl4/igt@kms_cursor_crc@cursor-256x256-suspend.html >> >> * igt@kms_cursor_crc@cursor-alpha-transparent: >> - shard-skl: [FAIL][29] ([fdo#109350]) -> [PASS][30] >> [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl10/igt@kms_cursor_crc@cursor-alpha-transparent.html >> [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl1/igt@kms_cursor_crc@cursor-alpha-transparent.html >> >> * igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled: >> - shard-skl: [FAIL][31] ([fdo#103184]) -> [PASS][32] >> [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl5/igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled.html >> [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl10/igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled.html >> >> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: >> - shard-iclb: [FAIL][33] ([fdo#103167]) -> [PASS][34] +5 similar issues >> [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html >> [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html >> >> * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: >> - shard-skl: [FAIL][35] ([fdo#108145] / [fdo#110403]) -> [PASS][36] >> [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html >> [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html >> >> * igt@kms_psr@psr2_basic: >> - shard-iclb: [SKIP][37] ([fdo#109441]) -> [PASS][38] +1 similar issue >> [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb5/igt@kms_psr@psr2_basic.html >> [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb2/igt@kms_psr@psr2_basic.html >> >> * igt@kms_rotation_crc@multiplane-rotation-cropping-top: >> - shard-kbl: [FAIL][39] ([fdo#109016]) -> [PASS][40] >> [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl7/igt@kms_rotation_crc@multiplane-rotation-cropping-top.html >> [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-kbl7/igt@kms_rotation_crc@multiplane-rotation-cropping-top.html >> >> * igt@kms_sysfs_edid_timing: >> - shard-iclb: [FAIL][41] ([fdo#100047]) -> [PASS][42] >> [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb3/igt@kms_sysfs_edid_timing.html >> [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb6/igt@kms_sysfs_edid_timing.html >> >> * igt@kms_vblank@pipe-c-ts-continuation-suspend: >> - shard-apl: [DMESG-WARN][43] ([fdo#108566]) -> [PASS][44] +2 similar issues >> [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl4/igt@kms_vblank@pipe-c-ts-continuation-suspend.html >> [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-apl2/igt@kms_vblank@pipe-c-ts-continuation-suspend.html >> >> >> #### Warnings #### >> >> * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt: >> - shard-apl: [SKIP][45] ([fdo#109271]) -> [INCOMPLETE][46] ([fdo#103927]) >> [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt.html >> [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-apl3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt.html >> >> >> [fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047 >> [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 >> [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184 >> [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 >> [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 >> [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 >> [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 >> [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 >> [fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773 >> [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807 >> [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 >> [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 >> [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686 >> [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016 >> [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 >> [fdo#109350]: https://bugs.freedesktop.org/show_bug.cgi?id=109350 >> [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 >> [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 >> [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403 >> >> >> Participating hosts (10 -> 9) >> ------------------------------ >> >> Missing (1): pig-skl-6260u >> >> >> Build changes >> ------------- >> >> * Linux: CI_DRM_6000 -> Patchwork_12877 >> >> CI_DRM_6000: a0c3fff52846356f63dd210cddf81e5bb01e7aa0 @ git://anongit.freedesktop.org/gfx-ci/linux >> IGT_4966: a75429544f5721316b04a36551c57573e0c79486 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools >> Patchwork_12877: 3e68f512f96fa2753bc9ebbba8604e463db1eb9d @ git://anongit.freedesktop.org/gfx-ci/linux >> piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit >> >> == Logs == >> >> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/ > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Thu, May 02, 2019 at 05:45:45PM +0300, Jani Nikula wrote: > On Thu, 02 May 2019, Imre Deak <imre.deak@intel.com> wrote: > > On Fri, Apr 26, 2019 at 08:39:12AM +0000, Patchwork wrote: > >> == Series Details == > >> > >> Series: series starting with [v2,1/2] drm/i915/icl: Factor out combo PHY lane power setup helper > >> URL : https://patchwork.freedesktop.org/series/59954/ > >> State : success > > > > Thanks for the review, series pushed to -dinq, with the s/icl_/intel_/ > > change and adding the headers to intel_combo_phy.h required by the > > recent header refactoring. > > Hey, I expected a resend. Please always resend the the rebased patches > for CI, and only push patches that have gone through CI! Ok, will do so. I assume though that trivial changes only in the commit message and/or code comments - if the reviewer has agreed to them - don't need a resend. That would only result in in an unecessary run through CI with unchanged code. > > BR, > Jani. > > > > > >> > >> == Summary == > >> > >> CI Bug Log - changes from CI_DRM_6000_full -> Patchwork_12877_full > >> ==================================================== > >> > >> Summary > >> ------- > >> > >> **SUCCESS** > >> > >> No regressions found. > >> > >> > >> > >> Known issues > >> ------------ > >> > >> Here are the changes found in Patchwork_12877_full that come from known issues: > >> > >> ### IGT changes ### > >> > >> #### Issues hit #### > >> > >> * igt@gem_tiled_swapping@non-threaded: > >> - shard-iclb: [PASS][1] -> [DMESG-WARN][2] ([fdo#108686]) > >> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb6/igt@gem_tiled_swapping@non-threaded.html > >> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb3/igt@gem_tiled_swapping@non-threaded.html > >> > >> * igt@i915_pm_rpm@legacy-planes: > >> - shard-skl: [PASS][3] -> [INCOMPLETE][4] ([fdo#107807]) > >> [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl5/igt@i915_pm_rpm@legacy-planes.html > >> [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl6/igt@i915_pm_rpm@legacy-planes.html > >> > >> * igt@kms_cursor_crc@cursor-64x64-dpms: > >> - shard-skl: [PASS][5] -> [FAIL][6] ([fdo#103232]) > >> [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@kms_cursor_crc@cursor-64x64-dpms.html > >> [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl5/igt@kms_cursor_crc@cursor-64x64-dpms.html > >> > >> * igt@kms_flip@flip-vs-expired-vblank-interruptible: > >> - shard-skl: [PASS][7] -> [FAIL][8] ([fdo#105363]) > >> [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html > >> [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html > >> > >> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt: > >> - shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#103167]) > >> [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html > >> [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html > >> > >> * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: > >> - shard-skl: [PASS][11] -> [INCOMPLETE][12] ([fdo#104108]) > >> [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html > >> [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html > >> > >> * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: > >> - shard-skl: [PASS][13] -> [FAIL][14] ([fdo#108145] / [fdo#110403]) > >> [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html > >> [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html > >> > >> * igt@kms_psr2_su@frontbuffer: > >> - shard-iclb: [PASS][15] -> [SKIP][16] ([fdo#109642]) > >> [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_psr2_su@frontbuffer.html > >> [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb1/igt@kms_psr2_su@frontbuffer.html > >> > >> * igt@kms_psr@psr2_sprite_render: > >> - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441]) +2 similar issues > >> [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_psr@psr2_sprite_render.html > >> [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb8/igt@kms_psr@psr2_sprite_render.html > >> > >> * igt@kms_psr@suspend: > >> - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([fdo#107773]) > >> [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl7/igt@kms_psr@suspend.html > >> [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl1/igt@kms_psr@suspend.html > >> > >> * igt@kms_rotation_crc@multiplane-rotation: > >> - shard-kbl: [PASS][21] -> [INCOMPLETE][22] ([fdo#103665]) > >> [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl4/igt@kms_rotation_crc@multiplane-rotation.html > >> [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-kbl4/igt@kms_rotation_crc@multiplane-rotation.html > >> > >> * igt@kms_vblank@pipe-a-ts-continuation-suspend: > >> - shard-apl: [PASS][23] -> [DMESG-WARN][24] ([fdo#108566]) +4 similar issues > >> [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html > >> [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-apl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html > >> > >> > >> #### Possible fixes #### > >> > >> * igt@gem_ctx_isolation@rcs0-s3: > >> - shard-kbl: [INCOMPLETE][25] ([fdo#103665]) -> [PASS][26] > >> [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl2/igt@gem_ctx_isolation@rcs0-s3.html > >> [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-kbl7/igt@gem_ctx_isolation@rcs0-s3.html > >> > >> * igt@kms_cursor_crc@cursor-256x256-suspend: > >> - shard-kbl: [DMESG-WARN][27] ([fdo#108566]) -> [PASS][28] > >> [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl5/igt@kms_cursor_crc@cursor-256x256-suspend.html > >> [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-kbl4/igt@kms_cursor_crc@cursor-256x256-suspend.html > >> > >> * igt@kms_cursor_crc@cursor-alpha-transparent: > >> - shard-skl: [FAIL][29] ([fdo#109350]) -> [PASS][30] > >> [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl10/igt@kms_cursor_crc@cursor-alpha-transparent.html > >> [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl1/igt@kms_cursor_crc@cursor-alpha-transparent.html > >> > >> * igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled: > >> - shard-skl: [FAIL][31] ([fdo#103184]) -> [PASS][32] > >> [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl5/igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled.html > >> [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl10/igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled.html > >> > >> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: > >> - shard-iclb: [FAIL][33] ([fdo#103167]) -> [PASS][34] +5 similar issues > >> [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html > >> [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html > >> > >> * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: > >> - shard-skl: [FAIL][35] ([fdo#108145] / [fdo#110403]) -> [PASS][36] > >> [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html > >> [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html > >> > >> * igt@kms_psr@psr2_basic: > >> - shard-iclb: [SKIP][37] ([fdo#109441]) -> [PASS][38] +1 similar issue > >> [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb5/igt@kms_psr@psr2_basic.html > >> [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb2/igt@kms_psr@psr2_basic.html > >> > >> * igt@kms_rotation_crc@multiplane-rotation-cropping-top: > >> - shard-kbl: [FAIL][39] ([fdo#109016]) -> [PASS][40] > >> [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-kbl7/igt@kms_rotation_crc@multiplane-rotation-cropping-top.html > >> [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-kbl7/igt@kms_rotation_crc@multiplane-rotation-cropping-top.html > >> > >> * igt@kms_sysfs_edid_timing: > >> - shard-iclb: [FAIL][41] ([fdo#100047]) -> [PASS][42] > >> [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-iclb3/igt@kms_sysfs_edid_timing.html > >> [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-iclb6/igt@kms_sysfs_edid_timing.html > >> > >> * igt@kms_vblank@pipe-c-ts-continuation-suspend: > >> - shard-apl: [DMESG-WARN][43] ([fdo#108566]) -> [PASS][44] +2 similar issues > >> [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl4/igt@kms_vblank@pipe-c-ts-continuation-suspend.html > >> [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-apl2/igt@kms_vblank@pipe-c-ts-continuation-suspend.html > >> > >> > >> #### Warnings #### > >> > >> * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt: > >> - shard-apl: [SKIP][45] ([fdo#109271]) -> [INCOMPLETE][46] ([fdo#103927]) > >> [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6000/shard-apl2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt.html > >> [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/shard-apl3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-pgflip-blt.html > >> > >> > >> [fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047 > >> [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 > >> [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184 > >> [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 > >> [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 > >> [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 > >> [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 > >> [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 > >> [fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773 > >> [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807 > >> [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 > >> [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 > >> [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686 > >> [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016 > >> [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 > >> [fdo#109350]: https://bugs.freedesktop.org/show_bug.cgi?id=109350 > >> [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 > >> [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 > >> [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403 > >> > >> > >> Participating hosts (10 -> 9) > >> ------------------------------ > >> > >> Missing (1): pig-skl-6260u > >> > >> > >> Build changes > >> ------------- > >> > >> * Linux: CI_DRM_6000 -> Patchwork_12877 > >> > >> CI_DRM_6000: a0c3fff52846356f63dd210cddf81e5bb01e7aa0 @ git://anongit.freedesktop.org/gfx-ci/linux > >> IGT_4966: a75429544f5721316b04a36551c57573e0c79486 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > >> Patchwork_12877: 3e68f512f96fa2753bc9ebbba8604e463db1eb9d @ git://anongit.freedesktop.org/gfx-ci/linux > >> piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit > >> > >> == Logs == > >> > >> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12877/ > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Jani Nikula, Intel Open Source Graphics Center
On Thu, 02 May 2019, Imre Deak <imre.deak@intel.com> wrote: > On Thu, May 02, 2019 at 05:45:45PM +0300, Jani Nikula wrote: >> On Thu, 02 May 2019, Imre Deak <imre.deak@intel.com> wrote: >> > Thanks for the review, series pushed to -dinq, with the s/icl_/intel_/ >> > change and adding the headers to intel_combo_phy.h required by the >> > recent header refactoring. >> >> Hey, I expected a resend. Please always resend the the rebased patches >> for CI, and only push patches that have gone through CI! > > Ok, will do so. > > I assume though that trivial changes only in the commit message and/or > code comments - if the reviewer has agreed to them - don't need a > resend. That would only result in in an unecessary run through CI with > unchanged code. Yup. BR, Jani.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index dc74d33c20aa..87f24d92e355 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3515,6 +3515,9 @@ void icl_combo_phys_init(struct drm_i915_private *dev_priv); void icl_combo_phys_uninit(struct drm_i915_private *dev_priv); void cnl_combo_phys_init(struct drm_i915_private *dev_priv); void cnl_combo_phys_uninit(struct drm_i915_private *dev_priv); +void icl_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv, + enum port port, bool is_dsi, + int lane_count, bool lane_reversal); int intel_gpu_freq(struct drm_i915_private *dev_priv, int val); int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index b74824f0b5b1..e332b9f69a4a 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1813,7 +1813,6 @@ enum i915_power_well_id { #define PWR_DOWN_LN_3 (0x8 << 4) #define PWR_DOWN_LN_2_1_0 (0x7 << 4) #define PWR_DOWN_LN_1_0 (0x3 << 4) -#define PWR_DOWN_LN_1 (0x2 << 4) #define PWR_DOWN_LN_3_1 (0xa << 4) #define PWR_DOWN_LN_3_1_0 (0xb << 4) #define PWR_DOWN_LN_MASK (0xf << 4) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index 9d962ea1e635..f2113d3798b0 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -363,30 +363,10 @@ static void gen11_dsi_power_up_lanes(struct intel_encoder *encoder) struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); enum port port; - u32 tmp; - u32 lane_mask; - switch (intel_dsi->lane_count) { - case 1: - lane_mask = PWR_DOWN_LN_3_1_0; - break; - case 2: - lane_mask = PWR_DOWN_LN_3_1; - break; - case 3: - lane_mask = PWR_DOWN_LN_3; - break; - case 4: - default: - lane_mask = PWR_UP_ALL_LANES; - break; - } - - for_each_dsi_port(port, intel_dsi->ports) { - tmp = I915_READ(ICL_PORT_CL_DW10(port)); - tmp &= ~PWR_DOWN_LN_MASK; - I915_WRITE(ICL_PORT_CL_DW10(port), tmp | lane_mask); - } + for_each_dsi_port(port, intel_dsi->ports) + icl_combo_phy_power_up_lanes(dev_priv, port, true, + intel_dsi->lane_count, false); } static void gen11_dsi_config_phy_lanes_sequence(struct intel_encoder *encoder) diff --git a/drivers/gpu/drm/i915/intel_combo_phy.c b/drivers/gpu/drm/i915/intel_combo_phy.c index 2bf4359d7e41..5478808886f1 100644 --- a/drivers/gpu/drm/i915/intel_combo_phy.c +++ b/drivers/gpu/drm/i915/intel_combo_phy.c @@ -203,6 +203,58 @@ static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv, return ret; } +void icl_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv, + enum port port, bool is_dsi, + int lane_count, bool lane_reversal) +{ + u8 lane_mask; + u32 val; + + if (is_dsi) { + WARN_ON(lane_reversal); + + switch (lane_count) { + case 1: + lane_mask = PWR_DOWN_LN_3_1_0; + break; + case 2: + lane_mask = PWR_DOWN_LN_3_1; + break; + case 3: + lane_mask = PWR_DOWN_LN_3; + break; + default: + MISSING_CASE(lane_count); + /* fall-through */ + case 4: + lane_mask = PWR_UP_ALL_LANES; + break; + } + } else { + switch (lane_count) { + case 1: + lane_mask = lane_reversal ? PWR_DOWN_LN_2_1_0 : + PWR_DOWN_LN_3_2_1; + break; + case 2: + lane_mask = lane_reversal ? PWR_DOWN_LN_1_0 : + PWR_DOWN_LN_3_2; + break; + default: + MISSING_CASE(lane_count); + /* fall-through */ + case 4: + lane_mask = PWR_UP_ALL_LANES; + break; + } + } + + val = I915_READ(ICL_PORT_CL_DW10(port)); + val &= ~PWR_DOWN_LN_MASK; + val |= lane_mask << PWR_DOWN_LN_SHIFT; + I915_WRITE(ICL_PORT_CL_DW10(port), val); +} + void icl_combo_phys_init(struct drm_i915_private *dev_priv) { enum port port;
Factor out the combo PHY lane power configuration code to a separate helper; it will be also needed by the next patch adding the same configuration for DDI ports. Add support for DDI ports and lane reversal as preparation for the next patch. The PWR_DOWN_LN_1 value is unspecified in the BSpec register description so remove it. v2: - Fix up the wrong assumption that the encodings are the same for DDI and DSI ports. (Jani) Cc: Jani Nikula <jani.nikula@intel.com> Cc: Madhav Chauhan <madhav.chauhan@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 3 ++ drivers/gpu/drm/i915/i915_reg.h | 1 - drivers/gpu/drm/i915/icl_dsi.c | 26 ++--------------- drivers/gpu/drm/i915/intel_combo_phy.c | 52 ++++++++++++++++++++++++++++++++++ 4 files changed, 58 insertions(+), 24 deletions(-)